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CC3130 Fiches technique(PDF) 36 Page - Texas Instruments |
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CC3130 Fiches technique(HTML) 36 Page - Texas Instruments |
36 / 75 page 8.15.6.3 DIO Interface Timing Note Digital IOs on CC3130 refers to antenna select, hostless mode, and BLE/2.4 GHz coexistence IOs not general purpose IOs Figure 8-15 shows the DIO timing diagram. SWAS037 V DD 80% 20% t DIOF t DIOR Figure 8-15. DIO Timing Diagram 8.15.6.3.1 DIO Output Transition Time Parameters (Vsupply = 3.3 V) Section 8.15.6.3.1.1 lists the DIO output transition times for Vsupply = 3.3 V. 8.15.6.3.1.1 DIO Output Transition Times (Vsupply = 3.3 V) (1) DRIVE STRENGTH (mA) DRIVE STRENGTH CONTROL BITS tr tf UNIT MIN NOM MAX MIN NOM MAX 2(2) 2MA_EN=1 8.0 9.3 10.7 8.2 9.5 11.0 ns 4MA_EN=0 4(2) 2MA_EN=0 6.6 7.1 7.6 4.7 5.2 5.8 ns 4MA_EN=1 6 2MA_EN=1 3.2 3.5 3.7 2.3 2.6 2.9 ns 4MA_EN=1 (1) Vsupply = 3.3 V, T = 25°C, total pin load = 30 pF (2) The 2-mA and 4-mA drive strength does not apply to the COEX I/O pins. Pins configured as COEX lines are invariably driven at 6 mA. 8.15.6.3.2 DIO Input Transition Time Parameters Section 8.15.6.3.2.1 lists the input transition time parameters. 8.15.6.3.2.1 DIO Input Transition Time Parameters PARAMETERS MIN MAX UNIT tr Input transition time (tr, tf), 10% to 90% 1 3 ns tf 1 3 ns CC3130 SWRS227 – MARCH 2020 www.ti.com 36 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
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