MC74LVX573 datasheet(4/8 Pages) ONSEMI

No de pièce	MC74LVX573

Description	Octal D-Type Latch with 3-State Outputs With 5 V?뭈olerant Inputs

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MC74LVX573

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CAPACITIVE CHARACTERISTICS

TA = 25°C

TA = − 40 to 85°C

Symbol

Parameter

Min

Typ

Max

Min

Max

Unit

Cin

Input Capacitance

4

10

pF

Cout

Maximum 3−State Output Capacitance

6

pF

CPD

Power Dissipation Capacitance (Note 2)

29

pF

2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per latch). CPD is used to determine the

no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.

NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package)

TA = 25°C

Symbol

Characteristic

Typ

Max

Unit

VOLP

Quiet Output Maximum Dynamic VOL

0.5

0.8

V

VOLV

Quiet Output Minimum Dynamic VOL

−0.5

−0.8

V

VIHD

Minimum High Level Dynamic Input Voltage

2.0

V

VILD

Maximum Low Level Dynamic Input Voltage

0.8

V

TIMING REQUIREMENTS (Input tr = tf = 3.0 ns)

TA = 25°C

TA = − 40 to 85°C

Symbol

Parameter

Test Conditions

Typ

Limit

Unit

tw(h)

Minimum Pulse Width, LE

VCC = 2.7 V

VCC = 3.3 ± 0.3 V

6.5

5.0

7.5

5.0

ns

tsu

Minimum Setup Time, D to LE

VCC = 2.7 V

VCC = 3.3 ± 0.3 V

5.0

3.5

5.0

3.5

ns

th

Minimum Hold Time, D to LE

VCC = 2.7 V

VCC = 3.3 ± 0.3 V

1.5

ns

ORDERING INFORMATION

Device

Package

Shipping†

MC74LVX573DWR2

SOIC−20

1000 / Tape & Reel

MC74LVX573DWR2G

SOIC−20

(Pb−Free)

1000 / Tape & Reel

MC74LVX573DT

TSSOP−20*

75 Units / Rail

MC74LVX573DTR2

TSSOP−20*

2500 / Tape & Reel

MC74LVX573M

SOEIAJ−20

50 Units / Rail

MC74LVX573MG

SOEIAJ−20

(Pb−Free)

50 Units / Rail

MC74LVX573MEL

SOEIAJ−20

2000 / Tape & Reel

MC74LVX573MELG

SOEIAJ−20

(Pb−Free)

2000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

Numéro de pièce similaire - MC74LVX573

Fabricant	No de pièce	Fiches technique	Description
Motorola, Inc	MC74LVX573	168Kb / 7P	LOW-VOLTAGE CMOS
ON Semiconductor	MC74LVX573	117Kb / 7P	Octal D-Type Latch with 3-State Outputs August, 2014 ??Rev. 5
Motorola, Inc	MC74LVX573DT	168Kb / 7P	LOW-VOLTAGE CMOS
ON Semiconductor	MC74LVX573DTG	117Kb / 7P	Octal D-Type Latch with 3-State Outputs August, 2014 ??Rev. 5
ON Semiconductor	MC74LVX573DTR2G	117Kb / 7P	Octal D-Type Latch with 3-State Outputs August, 2014 ??Rev. 5

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Description similaire - MC74LVX573

Fabricant	No de pièce	Fiches technique	Description
ON Semiconductor	MC74LVX373	101Kb / 8P	Octal D-Type Latch with 3-State Outputs With 5V?뭈olerant Inputs March, 2005 ??Rev. 2
NXP Semiconductors	74LVC573A	161Kb / 20P	Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 5-19 February 2013
Nexperia B.V. All right...	74LVC573A	274Kb / 16P	Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 8 - 27 August 2021
	74LVC573A-Q100	261Kb / 16P	Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state
	74LVC373A	274Kb / 15P	Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 5 - 27 August 2021
NXP Semiconductors	74LVC373A	150Kb / 19P	Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 3-22 November 2012
ON Semiconductor	MC74LVX374	101Kb / 8P	Octal D-Type Flip-Flop with 3-State Outputs With 5V?뭈olerant Inputs March, 2005 ??Rev. 2
NXP Semiconductors	74LVC373A	103Kb / 12P	Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State 1998 Jul 29
NXP Semiconductors	74LVC573A	102Kb / 12P	Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State 1998 Jul 29
Fairchild Semiconductor	74VHC573MX	253Kb / 9P	Octal D-Type Latch with 3-STATE Outputs

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