522 - 23 - 01

5

PIN DESCRIPTIONS

NUMBER

SYMBOL

TYPE

DESCRIPTION

1, 3, 4, 6, 7, 9, 10,

24, 25, 27, 29, 31,

33, 34, 36, 38

NC

No connection. These pins are not bonded to the die.

2

LFS

INPUT

Loop filter capacitor connection.

POWER

Most negative power supply connection - loop filter circuitry.

POWER

Most positive power supply connection - loop filter circuitry.

11

LFA

OUTPUT

Control signal output: control voltage for the external GO1515 VCO.

12

POWER

Most negative power supply connection - that enables the jitter demodulator

functionality, this pin should be connected to ground. If left floating, the DM

function is disabled resulting in a current saving of 340µA.

13, 14

PLCAP,

PLCAP

INPUT

Control signal input: PLL lock detect time constant capacitor connection.

15, 18, 22

SHIELD

No connect pins separating the DDI inputs, the VCO inputs and the loop filter

components to improve noise performance. Connection to be made to ground

in most cases depending upon PCB performance.

16, 17

VCO, VCO

INPUT

Control signal inputs: differential inputs for the external VCO. The GO1515 has

single ended output. In this case, the VCO input is decoupled to ground.

19

INPUT

Centre tap of the two 50

Ω on-chip termination resistors between the DDI and

the DDI inputs.

20, 21

DDI, DDI

INPUT

Differential inputs for the serial digital signals.

23

POWER

Most positive power supply connection - phase detector circuitry.

26

POWER

Most negative poser supply connection - phase detector circuitry.

28

POWER

Most negative power supply connection - cable driver circuitry.

30

INPUT

Resistor used to set the serial digital output signal swing. It is connected

between here and ground with a very short trace length.

32

POWER

Most positive power supply connection - cable driver circuitry.

35, 37

SDO, SDO

OUTPUT

Differential serial digital outputs from the on-chip cable driver. These outputs

require 75

Ω pull-up resistors.

39, 40

DM, DM

OUTPUT

Diagnostic signal: if the jitter demodulator function is not used, these pins must

be left floating.

41

IJI

OUTPUT

Status signal output: indicates the amount of excessive jitter on the incoming

DDI and DDI signals.

42

PLL_LOCK

OUTPUT

Status signal output: lock detect and carrier detect: PLL lock indicator output

used to indicate when the PLL is locked. This output is TTL compatible. When

the PLL_LOCK = LOW, the serial digital outputs are muted.

43

BYPASS

INPUT

Control signal input: operational TTL compatible input that controls whether the

input DDI and DDI signal is reclocked (BYPASS = HIGH) or is passed through

the device, unreclocked (BYPASS = LOW). Muting does not affect the

bypassed signal.

44

LFS

INPUT

Loop filter capacitor connection.