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ISL8102 Fiches technique(PDF) 5 Page - Intersil Corporation |
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ISL8102 Fiches technique(HTML) 5 Page - Intersil Corporation |
5 / 27 page 5 FN9247.0 October 19, 2005 Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V Absolute Boot Voltage, VBOOT . . . . . . . . GND - 0.3V to GND + 36V Phase Voltage, VPHASE . . . . . . . . GND - 0.3V to 15V (PVCC = 12) GND - 8V (<400ns, 20µJ) to 24V (<200ns, VBOOT-PHASE = 12V) Upper Gate Voltage, VUGATE . . . . VPHASE - 0.3V to VBOOT + 0.3V VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V Lower Gate Voltage, VLGATE. . . . . . . . GND - 0.3V to PVCC + 0.3V GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD Recommended Operating Conditions VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5% Ambient Temperature (ISL8102CR, ISL8102CRZ) . . . . 0°C to 70°C Ambient Temperature (ISL8102IR, ISL8102IRZ) . . . .-40°C to 85°C Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) QFN Package (Notes 1, 2) . . . . . . . . . . 35 5 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Recommended Operating Conditions, Unless Otherwise Specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS BIAS SUPPLY AND INTERNAL OSCILLATOR Input Bias Supply Current IVCC; ENLL = high - 15 20 mA Gate Drive Bias Current IPVCC; ENLL = high, all gate outputs open, Fsw = 250kHz -1.5 3.0 mA VCC POR (Power-On Reset) Threshold VCC Rising 4.25 4.38 4.50 V VCC Falling 3.75 3.88 4.00 V PVCC POR (Power-On Reset) Threshold PVCC Rising 4.25 4.38 4.50 V PVCC Falling 3.75 3.88 4.00 V Oscillator Ramp Amplitude (Note 3) VPP -1.50 - V Maximum Duty Cycle (Note 3) - 66.6 - % CONTROL THRESHOLDS ENLL Rising Threshold -0.66 - V ENLL Hysteresis - 100 - mV COMP Shutdown Threshold COMP Falling 0.25 0.35 0.5 V REFERENCE AND DAC System Accuracy (DAC = 0.6V, 0.9V) DROOP connected to IREF -0.8 - 0.8 % System Accuracy (DAC = 1.2V, 1.50V) DROOP connected to IREF -0.5 - 0.5 % DAC Input Low Voltage (REF0, REF1) - - 0.4 V DAC Input High Voltage (REF0, REF1) 0.8 - - V External Reference (Note 3) 0.6 - 1.75 V OFS Sink Current Accuracy (Negative Offset) ROFS = 30kΩ from OFS to VCC 47.5 50.0 52.5 µA OFS Source Current Accuracy (Positive Offset) ROFS = 10kΩ from OFS to GND 47.5 50.0 52.5 µA ISL8102 |
Numéro de pièce similaire - ISL8102 |
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Description similaire - ISL8102 |
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