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CS42438 Fiches technique(PDF) 19 Page - Cirrus Logic |
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CS42438 Fiches technique(HTML) 19 Page - Cirrus Logic |
19 / 64 page DS646PP2 19 Notes: 10. Guaranteed by design. The DC current draw represents the allowed current draw from the AOUT pin due to typical leakage through the electrolytic DC blocking capacitors. 11. One-half LSB of triangular PDF dither is added to data. 12. Guaranteed by design. See Figure 3. RL and CL reflect the recommended minimum resistance and maximum capacitance required for the internal op-amp's stability and signal integrity. In this circuit topology, CL will effectively move the dominant pole of the two-pole amp in the output stage. Increasing this value beyond the recommended 100 pF can cause the internal op-amp to become unstable. See Appendix A for a recommended output filter. All Speed Modes Interchannel Isolation (1 kHz) - 100 - - 100 - dB Analog Output Full Scale Output 1.210•VA 1.300•VA 1.392•VA 0.605•VA 0.650•VA 0.696•VA Vpp Interchannel Gain Mismatch - 0.1 0.25 - 0.1 0.25 dB Gain Drift - ±100 - - ±100 - ppm/°C Output Impedance - 100 - - 100 - Ω DC Current draw from an AOUT pin (Note 10) -- 10 - - 10 µA AC-Load Resistance (RL) (Note 12) 3- - 3 - - k Ω Load Capacitance (CL) (Note 12) - - 100 - - 100 pF 100 50 75 25 2.5 510 15 Safe Operating Region Resistive Load -- R (k Ω ) L 125 3 20 AOUTxx 3.3 µF Analog Output C L + R L DAC1-4 AGND Figure 3. Output Test Load Figure 4. Maximum Loading |
Numéro de pièce similaire - CS42438 |
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Description similaire - CS42438 |
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