Moteur de recherche de fiches techniques de composants électroniques |
|
CS4270-DZZR Fiches technique(PDF) 6 Page - Cirrus Logic |
|
CS4270-DZZR Fiches technique(HTML) 6 Page - Cirrus Logic |
6 / 48 page 6 DS686A1 CS4270 1. PIN DESCRIPTIONS - SOFTWARE MODE Pin Name # Pin Description SDIN 1 Serial Audio Data Input (Input) - Input for two’s complement serial audio data. LRCK 2 Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the serial audio data line. MCLK 3 Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. SCLK 4 Serial Clock (Input/Output) - Serial clock for the serial audio interface. VD 5 Digital Power (Input) - Positive power supply for the digital section. DGND 6 Digital Ground (Input) - Ground reference for the internal digital section. SDOUT 7 Serial Audio Data Output (Output) - Output for two’s complement serial audio data. VLC 8 Control Port Power (Input) - Determines the signal level for the control port. SDA/CDOUT 9 Serial Control Data (Input/Output) - SDA is a data I/O in I²C mode. CDOUT is the output data line for the control port interface in SPI mode. SCL/CCLK 10 Serial Control Port Clock (Input) - Serial clock for the serial control port. AD0/CS 11 Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode. CS is the chip select signal for SPI format. AD1/CDIN 12 Address Bit 1 (I²C) / Serial Control Data (Input) - AD1 is a chip address pin in I²C mode. CDIN is the input data line for the control port interface in SPI mode. AD2 13 Address Bit 2 (I²C) (Input) - AD2 is a chip address pin in I²C mode. RST 14 Reset (Input) - The device enters a low power mode when low. AINA AINB 15 16 Analog Input (Input) - The full-scale analog input level is specified in the ADC Analog Characteristics specification table. VQ 17 Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. FILT+ 18 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. VA 19 Analog Power (Input) - Positive power for the analog sections. AGND 20 Analog Ground (Input) - Ground reference. Must be connected to analog ground. MUTEA MUTEB 21 24 Mute Control (Output) - Each pin is active during power-up initialization, reset, muting, when master clock to left/right clock frequency ratio is incorrect, or power-down. AOUTA AOUTB 22 23 Analog Audio Output (Output) - The full-scale output level is specified in the DAC Analog Character- istics specification table. 1 2 3 4 5 6 7 8 21 22 23 24 9 10 11 12 17 18 19 20 13 14 15 16 SDIN LRCK MCLK SCLK VD DGND SDOUT VLC SDA/CDOUT SCL/CCLK AD0/CS AD1/CDIN MUTEB AOUTB AOUTA MUTEA AGND VA FILT+ VQ AINB AINA RST AD2 |
Numéro de pièce similaire - CS4270-DZZR |
|
Description similaire - CS4270-DZZR |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |