Moteur de recherche de fiches techniques de composants électroniques |
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MC14018BFEL Fiches technique(PDF) 5 Page - ON Semiconductor |
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MC14018BFEL Fiches technique(HTML) 5 Page - ON Semiconductor |
5 / 8 page MC14018B http://onsemi.com 5 TIMING DIAGRAM (Q5 Connected to Data Input) CLOCK RESET PRESET ENABLE JAM 1 JAM 2 JAM 3 JAM 4 JAM 5 Q1 Q2 Q3 Q4 Q5 DON’T CARE UNTIL PRESET ENABLE GOES HIGH 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 LOGIC DIAGRAM JAM 1 JAM 2 JAM 3 JAM 4 JAM 5 12 9 7 3 2 CLOCK 14 DATA 1 RESET 15 PRESET ENABLE 10 CLOCK SHAPER 54 6 11 13 Q1Q2Q3Q4Q5 SS SS S DD DDD CC CC C QQ Q Q Q RP RP R P RP R P Q VDD = PIN 16 VSS = PIN 8 FUNCTION SELECTION Counter Mode Connect Data Input (Pin 1) to: Comments Divide by 10 Divide by 8 Divide by 6 Divide by 4 Divide by 2 Q5 Q4 Q3 Q2 Q1 No external components needed. Divide by 9 Divide by 7 Divide by 5 Divide by 3 Q5 • Q4 Q4 • Q3 Q3 • Q2 Q2 • Q1 Gate package needed to provide AND function. Counter Skips all 1’s state |
Numéro de pièce similaire - MC14018BFEL |
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Description similaire - MC14018BFEL |
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