MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

2–131

REV 6

9/96

Four-Bit Universal Shift

Register

The MC10H141 is a four–bit universal shift register. This device is a

functional/pinout duplication of the standard MECL 10K part with 100%

improvement in propagation delay and operation frequency and no increase in

power supply current.

• Shift frequency, 250 MHz Min

• Power Dissipation, 425 mW Typical

• Improved Noise Margin 150 mV (over operating voltage and

temperature range)

• Voltage Compensated

• MECL 10K–Compatible

MAXIMUM RATINGS

Characteristic

Symbol

Rating

Unit

Power Supply (VCC = 0)

VEE

–8.0 to 0

Vdc

Input Voltage (VCC = 0)

VI

0 to VEE

Vdc

Output Current — Continuous

— Surge

Iout

50

100

mA

Operating Temperature Range

TA

0 to +75

°C

Storage Temperature Range — Plastic

— Ceramic

Tstg

–55 to +150

–55 to +165

°C

°C

ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%)

0

°

25

°

75

°

Characteristic

Symbol

Min

Max

Min

Max

Min

Max

Unit

Power Supply Current

IE

—

112

—

102

—

112

mA

Input Current High

Pins 5,6,9,11,12,13

Pins 7,10

Pin 4

IinH

—

—

—

405

416

510

—

—

—

255

260

320

—

—

—

255

260

320

µA

Input Current Low

IinL

0.5

—

0.5

—

0.3

—

µA

High Output Voltage

VOH

–1.02

–0.84

–0.98

–0.81

–0.92

–0.735

Vdc

Low Output Voltage

VOL

–1.95

–1.63

–1.95

–1.63

–1.95

–1.60

Vdc

High Input Voltage

VIH

–1.17

–0.84

–1.13

–0.81

–1.07

–0.735

Vdc

Low Input Voltage

VIL

–1.95

–1.48

–1.95

–1.48

–1.95

–1.45

Vdc

AC PARAMETERS

Propagation Delay

tpd

1.0

2.0

1.0

2.0

1.1

2.1

ns

Hold Time —

Data, Select

thold

1.0

—

1.0

—

1.0

—

ns

Set–up Time

Data

Select

tset

1.5

3.0

—

—

1.5

3.0

—

—

1.5

3.0

—

—

ns

Rise Time

tr

0.5

2.4

0.5

2.4

0.5

2.4

ns

Fall Time

tf

0.5

2.4

0.5

2.4

0.5

2.4

ns

Shift Frequency

fshift

250

—

250

—

250

—

MHz

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,

after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit

board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through

a 50 ohm resistor to –2.0 volts.

L

HQ2n

32n

H

Parallel Entry

Stop Shift

Q0n

MC10H141

DIP

PIN ASSIGNMENT

VCC1

Q2

Q3

C

DR

D3

S2

VEE

VCC2

Q1

Q0

DL

D0

D1

S1

D2

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

TRUTH TABLE

SELECT

OPERATING

MODE

OUTPUTS

S1

S2

Q1n + 1 Q2n + 1 Q3n + 1

L

L

* Outputs as exist after pulse appears at “C” input with

input conditions as shown (Pulse Positive transition of

clock input).

D0

D1

D2

D3

H

Shift Right*

Q1n

Q2n

Q3n

DR

H

L

Shift Left*

DL

Q0n

Q1n

Q2n

Q1n

Q0n + 1

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).