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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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DLPC900 Fiches technique(PDF) 74 Page - Texas Instruments |
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DLPC900 Fiches technique(HTML) 74 Page - Texas Instruments |
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74 / 83 page  74 DLPC900 DLPS037D – OCTOBER 2014 – REVISED MARCH 2019 www.ti.com Product Folder Links: DLPC900 Submit Documentation Feedback Copyright © 2014–2019, Texas Instruments Incorporated 10.1.15 Decoupling Decoupling capacitors must be located as near as possible to the DLPC900 voltage supply pins. Capacitors should not share vias. The DLPC900 power pins can be connected directly to the decoupling capacitor (no via) if the trace is less than 0.03”. Otherwise the component should be tied to the voltage or ground plane through a separate via. All capacitors should be connected to the power planes with trace lengths less than 0.05”. Try to mount decoupling capacitors connecting to power rail VDD11 (1.15 V) using “via on sides” geometry as shown below in Figure 42. If “via on the side” is not possible, 1.15 V decoupling capacitors can be mounted using “via at ends” method, providing traces between the vias and decoupling capacitors’ pads be as short and wide (at least 15mils wide) as possible. Figure 42. Decoupling Via Placement 10.1.16 Fiducials Fiducials for automatic component insertion should be placed on the board according to the following guidelines or on recommendation from manufacturer: • Fiducials for optical auto insertion alignment shall be placed on three corners of both sides of the PCB • Fiducials should be 0.050” copper with 0.100” cutout (antipad). |
Numéro de pièce similaire - DLPC900_V01 |
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Description similaire - DLPC900_V01 |
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