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DAC53401 Fiches technique(PDF) 27 Page - Texas Instruments |
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DAC53401 Fiches technique(HTML) 27 Page - Texas Instruments |
27 / 43 page 27 DAC53401, DAC43401 www.ti.com SLASES7 – JULY 2019 Product Folder Links: DAC53401 DAC43401 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 8.6.1 STATUS Register (address = D0h) (reset = 000Ch or 0014h) Figure 8. STATUS Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 NVM_CRC_ ALARM_ USER NVM_CRC_ ALARM_ INTERNAL NVM_ BUSY DAC_ UPDATE_ BUSY X DEVICE_ID VERSION_ID R R R R X R R Table 18. STATUS Register Field Descriptions BIT FIELD TYPE RESET DESCRIPTION 15 NVM_CRC_ALARM_USER R 0 0 : No CRC error in user NVM bits 1: CRC error in user NVM bits 14 NVM_CRC_ALARM_INTERNA L R 0 0 : No CRC error in internal NVM 1: CRC error in internal NVM bits 13 NVM_BUSY R 0 0 : NVM write or load completed, Write to DAC registers allowed 0 : NVM write or load in progress, Write to DAC registers not allowed 12 DAC_UPDATE_BUSY R 0 0 : DAC outputs updated, Write to DAC registers allowed 0 : DAC outputs update in progress, Write to DAC registers not allowed 11 - 6 X X 00h Don't care 5 - 2 DEVICE_ID R R DAC53401: 0Ch DAC43401: 14h DAC53401: 0Ch DAC43401: 14h 1 - 0 VERSION_ID 8.6.2 GENERAL_CONFIG Register (address = D1h) (reset = 11F0h) Figure 9. GENERAL_CONFIG Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FUNC_ CONFIG DEVICE_ LOCK EN_ PMBUS CODE_STEP SLEW_RATE DAC_PDN REF_EN DAC_SPAN R/W W R/W R/W R/W R/W R/W R/W Table 19. GENERAL_CONFIG Register Field Descriptions BIT FIELD TYPE RESET DESCRIPTION 15 - 14 FUNC_CONFIG R/W 00 00 : Generates a triangle wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code with slope defined by SLEW_RATE (address D1h) bits 01: Generates Saw-Tooth wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code, with rising slope defined by SLEW_RATE (address D1h) bits and immediate falling edge 10: Generates Saw-Tooth wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code, with falling slope defined by SLEW_RATE (address D1h) bits and immediate rising edge 11: Generates a square wave between MARGIN_HIGH (address 25h) code to MARGIN_LOW (address 26h) code with pulse high and low period defined by SLEW_RATE (address D1h) bits 13 DEVICE_LOCK W 0 0 : Device not locked 1: Device locked, the device locks all the registers. This bit can be reset (unlock device) by writing 0101 to the DEVICE_UNLOCK_CODE bits (address D3h) 12 RESERVED Reserved 1 Reserved |
Numéro de pièce similaire - DAC53401_V01 |
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Description similaire - DAC53401_V01 |
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