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CDCDB2000 Fiches technique(PDF) 15 Page - Texas Instruments |
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CDCDB2000 Fiches technique(HTML) 15 Page - Texas Instruments |
15 / 33 page PWRGD PD# CKPWRGD_PD# VDD/VDD_A 15 CDCDB2000 www.ti.com SNAS787 – NOVEMBER 2019 Product Folder Links: CDCDB2000 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Device Functional Modes (continued) Figure 6. PWRGD and PD# State Changes 7.4.2 OE[12:5]# and SMBus Output Enables Each output channel, 0 to 19, can be individually enabled or disabled by SMBus control register bits, called SMB enable bits. Additionally, each output channel from 12 to 5 has a dedicated, corresponding, OE[12:5]# hardware pin. The OE[12:5]# pins are asynchronously asserted-low signals that may enable or disable the output. Refer to Table 2 for enabling and disabling outputs through the hardware and software. Note that both the SMB enable bit must be a ‘1’ and the OEx# pin must be an input low voltage ‘0’ for the output channel to be active. Table 2 is only valid when the SBEN signal is low (SBEN = 0). Table 2. OE[12:5]# Functionality When SBEN = 0 INPUTS OE[12:5]# HARDWARE PINS AND SMBus CONTROL REGISTER BITS PWRGD PD# CLKIN SMBus ENABLE BIT (byte[2:0]) OE[12:5]# CK[12:5] CK[19:13, 4:0] 0 X X X X LOW LOW 1 0 X X X Tristate Tristate 1 1 Running 0 X 0 0 1 1 Running 1 0 Running Running 1 1 Running 1 1 0 Running 7.5 Programming The CDCDB2000 has two methods to program the states of its 20 output drivers: SMBus and SBI. To select between SMBus and SBI interfaces, the SBEN pin is used. Pulling the SBEN to a high level enables the SBI. Pulling the SBEN pin to ground enables the SMBus interface. When SBI is enabled, the SMBus Mask registers are active. The SMBus Mask registers allow the function of the SBI shift registers to be disabled and set the each individual channel as enabled. See Figure 7 for a diagram of how the SMBus Mask registers and SBI shift register interact to enable or disable each output. |
Numéro de pièce similaire - CDCDB2000 |
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Description similaire - CDCDB2000 |
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