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CAT25C65U14A-TE13 Fiches technique(PDF) 3 Page - Catalyst Semiconductor |
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CAT25C65U14A-TE13 Fiches technique(HTML) 3 Page - Catalyst Semiconductor |
3 / 11 page 3 CAT25C33/65 Doc No. 1000, Rev. F Limits Vcc= VCC = VCC = 1.8V-6.0V 2.5V-6.0V 4.5V-5.5V Test SYMBOL PARAMETER Min. Max. Min. Max. Min. Max. UNITS Conditions tSU Data Setup Time 50 50 20 ns tH Data Hold Time 50 50 20 ns tWH SCK High Time 250 125 40 ns tWL SCK Low Time 250 125 40 ns fSCK Clock Frequency DC 1 DC 3 DC 10 MHz tLZ HOLD to Output Low Z 50 50 50 ns tRI(1) Input Rise Time 2 2 2 µs tFI(1) Input Fall Time 2 2 2 µs tHD HOLD Setup Time 100 100 40 ns tCD HOLD Hold Time 100 100 40 ns tWC Write Cycle Time 10 10 5 ms tV Output Valid from Clock Low 250 250 80 ns tHO Output Hold Time 0 0 0 ns tDIS Output Disable Time 250 250 75 ns tHZ HOLD to Output High Z 150 100 50 ns tCS CS High Time 500 250 200 ns tCSS CS Setup Time 500 250 100 ns tCSH CS Hold Time 500 250 100 ns NOTE: (1) This parameter is tested initially and after a design or process change that affects the parameter. A.C. CHARACTERISTICS CL = 50pF PIN CAPACITANCE (1) Applicable over recommended operating range from TA=25˚C, f=1.0 MHz, VCC=+5.0V (unless otherwise noted). Symbol Test Conditions Max. Units Conditions COUT Output Capacitance (SO) 8 pF VOUT=0V CIN Input Capacitance ( CS, SCK, SI, WP, HOLD)6 pF VIN=0V |
Numéro de pièce similaire - CAT25C65U14A-TE13 |
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Description similaire - CAT25C65U14A-TE13 |
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