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BM83 Fiches technique(PDF) 46 Page - Microchip Technology |
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BM83 Fiches technique(HTML) 46 Page - Microchip Technology |
46 / 74 page Table 6-1. BM83 Module - Test Mode Configuration Settings Pins Status Mode P3_4 Low Test mode Floating Application mode Note: The BM83 module provides Test mode, which allows customers to use existing module manufacturing and testing equipment and flow to test the BM83 modules without reinvesting in new test equipment. New customers are encouraged to use the new RF test modes defined for this device. Test mode allows an external UART host to communicate with the BM83 using Bluetooth vendor commands over the UART interface. The host can interface with the driver firmware on the BM83 module to perform TX/RX operations and to collect/report Bit Error Rate (BER) and other RF performance parameters. These values can then be used to accept/reject the device and/or calibrate the module. 6.4.2 2-wire JTAG Program and Debug The BM83 (IS2083BM) provides physical interface for connecting and programming the memory contents, see the following figure. For all the programming interfaces, the target device (IS2083BM) must be powered, and all required signals must be connected. In addition, the interface must be enabled through a special initialization sequence. Note: For more details on 2-wire prog/debug, refer to the IS2083 SDK User’s Guide and IS2083 SDK Debugger User’s Guide . Figure 6-10. 2-wire In-Circuit Serial Programming (ICSP) Interface IS283BM SoC BM83 (IS2083BM) Programmer/ Debugger 2-Wire ICSP TM The 2-wire ICSP port can be used to program the memory content. This interface uses the following two communication lines to transfer data to and from the BM83 (IS2083BM) device being programmed: • Serial Program Clock (TCK_CPU) • Serial Program Data (TDI_CPU) These signals are described in the following sections. The following table describes the signals required for the 2-wire ICSP interface. Table 6-2. 2-wire Interface Pin Description Pin Name Pin Type Description RST_N I Reset pin VDD_IO, ADAP_IN, BAT_IN P Power supply pins GND P Ground pin TCK_CPU I Primary programming pin pair: Serial Clock TDI_CPU I/O Primary programming pin pair: Serial Data 6.4.2.1 Serial Program Clock (TCK_CPU) TCK_CPU is the clock that controls the TAP controller update and the shifting of data through the instruction or selected data registers. TCK_CPU is independent of the processor clock, with respect to both frequency and phase. BM83 Application Information © 2019 Microchip Technology Inc. Preliminary Datasheet DS70005402A-page 46 |
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Description similaire - BM83 |
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