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TPS5140 Fiches technique(PDF) 11 Page - Texas Instruments

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No de pièce TPS5140
Description  FOUR-CHANNEL DC/DC CONTROLLER FOR NOTEBOOK PC POWER
Download  59 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS5140 Fiches technique(HTML) 11 Page - Texas Instruments

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TPS5140
FOUR-CHANNEL DC/DC CONTROLLER FOR NOTEBOOK PC POWER
SLVS305A – DECEMBER 2000 – REVISED JANUARY 2001
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
UVP (12-V boost converter)
TPS5140 monitors output under voltage of the 12-V boost converter. When an output under voltage is detected,
the timer starts to charge an external capacitor that is connected to the SCP terminal. After a programmable
time delay, the SCP circuit forces all (CH1, 2, 3, and 12 V) MOSFETs drivers to latch off.
SOFTSTART_12V
An internal capacitor exists for 12-V soft start. If the soft start time needs to be extended, an external capacitor
should be connected to this terminal. The12-V boost converter must start when REG5V_IN terminal is over
4.5 V.
current limit of 12-V boost converter
The 12-V boost current limit monitors the current flowing through the internal MOSFET. When the voltage drop
across the internal N-channel MOSFET is high enough during its on time, the current limit circuit forces the
internal N-channel MOSFET to turn off.
PHASE_12V
The 12-V boost converter does not typically require phase compensation. If there is reason to change the phase,
the 12-V boost converter can be phase compensated by inserting external resistors and capacitors to GND.
Otherwise, the PHASE_12V terminal should be left open.
logic charts
Table 1. Logic Chart1
STBY1
STBY2
STBY3
CH1
CH2
CH3
PGOUT
L
L
L
Disable
Disable
Disable
N/A
L
L
H
Disable
Disable
Enable
Active†
L
H
L
Disable
Enable
Disable
Active†
L
H
H
Disable
Enable
Enable
Active†
H
L
L
Enable
Disable
Disable
Active†
H
L
H
Enable
Disable
Enable
Active†
H
H
L
Enable
Enable
Disable
Active†
H
H
H
Enable
Enable
Enable
Active†
† During softstart, PGOUT is active low.
Table 2. Logic Chart2
STBY_VREF5
STBY_VREF3.3
VREF5‡
VREF3.3
L
L
N/A
Disable
H
L
Enable
Disable
L
H
Enable
Enable
H
H
Enable
Enable
‡ To disable VREF5, all STBY1, 2, 3, STBY_VREF3.3 and
STBY_VREF5 must be L.
Table 3. Logic Chart3
STBY12V
REG5V_IN
12 VOUT
L
L
Disable
L
H
Disable
H
L
Disable
H
H
Enable


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