Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

DAC5687 Fiches technique(PDF) 4 Page - Texas Instruments

Click here to check the latest version.
No de pièce DAC5687
Description  16-BIT, 500 MSPS 2x-8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
Download  72 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

DAC5687 Fiches technique(HTML) 4 Page - Texas Instruments

  DAC5687 Datasheet HTML 1Page - Texas Instruments DAC5687 Datasheet HTML 2Page - Texas Instruments DAC5687 Datasheet HTML 3Page - Texas Instruments DAC5687 Datasheet HTML 4Page - Texas Instruments DAC5687 Datasheet HTML 5Page - Texas Instruments DAC5687 Datasheet HTML 6Page - Texas Instruments DAC5687 Datasheet HTML 7Page - Texas Instruments DAC5687 Datasheet HTML 8Page - Texas Instruments DAC5687 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 72 page
background image
www.ti.com
DAC5687
SLWS164B – FEBRUARY 2005 – REVISED JUNE 2005
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
In PLL clock mode and dual clock modes, provides data input rate clock. In external clock mode,
CLK1
59
I
provides optional input data rate clock to FIFO latch. When the FIFO is disabled, CLK1 is not used
and can be left unconnected.
CLK1C
60
I
Complementary input of CLK1.
External and dual clock mode clock input. In PLL mode, CLK2 is unused and can be left
CLK2
62
I
unconnected.
CLK2C
63
I
Complementary of CLK2. In PLL mode, CLK2C is unused and can be left unconnected.
CLKGND
58, 64
I
Ground return for internal clock buffer
CLKVDD
61
I
Internal clock buffer supply voltage
34-36, 39-43,
A-Channel Data bits 0 through 15. DA15 is most significant data bit (MSB). DA0 is least significant
DA[15..0]
I
48-55
data bit (LSB). Order can be reversed by register change.
71-78, 83-87,
B-Channel Data bits 0 through 15. DB15 is most significant data bit (MSB). DB0 is least significant
DB[0..15]
I
90-92
data bit (LSB). Order can be reversed by register change.
27, 38, 45, 57,
DGND
69, 81, 88, 93,
I
Digital ground return
99
26, 32, 37, 44,
DVDD
56, 68, 82, 89,
I
Digital supply voltage
100
Used as external reference input when internal reference is disabled (i.e., EXTLO connected to
EXTIO
11
I/O
AVDD). Used as internal reference output when EXTLO = AGND, requires a 0.1-µF decoupling
capacitor to AGND when used as reference output
Internal/external reference select. Internal reference selected when tied to AGND, external
EXTLO
15
I/O
reference selected when tied to AVDD. Output only when ATEST is not zero (register 0x1B bits 7
to 3).
IOUTA1
21
O
A-Channel DAC current output. Full scale when all input bits are set 1
IOUTA2
20
O
A-Channel DAC complementary current output. Full scale when all input bits are 0
IOUTB1
5
O
B-Channel DAC current output. Full scale when all input bits are set 1
IOUTB2
6
O
B-Channel DAC complementary current output. Full scale when all input bits are 0
IOGND
47, 79
I
Digital I/O ground return
IOVDD
46, 80
I
Digital I/O supply voltage
LPF
66
I
PLL loop filter connection
Synchronization input signal that can be used to initialize the NCO, course mixer, internal clock
PHSTR
94
I
divider, and/or FIFO circuits.
PLLGND
65
I
Ground return for internal PLL
PLLVDD
67
I
PLL supply voltage. When PLLVDD is 0 V, the PLL is disabled.
In PLL mode, provides PLL lock status bit or internal clock signal. PLL is locked to input clock
PLLLOCK
70
O
when high. In external clock mode, provides input rate clock.
When qflag register is 1, the QFLAG pin is used by the user during interleaved data input mode to
QFLAG
98
I
identify the B sample. High QFLAG indicates B sample. Must be repeated every B sample.
RESETB
95
I
Resets the chip when low. Internal pull-up
SCLK
29
I
Serial interface clock
SDENB
28
I
Active low serial data enable, always an input to the DAC5687
Bidirectional serial data in 3-pin interface mode, input only in 4 pin interface mode. Three-pin mode
SDIO
30
I/O
is the default after chip reset.
Serial interface data, uni-directional data output, if SDIO is an input. SDO is 3-stated when the
SDO
31
O
3-pin interface mode is selected (register 0x08 bit 1).
SLEEP
96
I
Asynchronous hardware power down input. Active High. Internal pull down.
4


Numéro de pièce similaire - DAC5687

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
DAC5687 TI-DAC5687 Datasheet
2Mb / 79P
[Old version datasheet]   16-BIT, 500 MSPS 2?? INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5687-EP TI1-DAC5687-EP Datasheet
2Mb / 75P
[Old version datasheet]   16-BIT 500-MSPS 2쨈??쨈 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5687-EP TI-DAC5687-EP_15 Datasheet
2Mb / 76P
[Old version datasheet]   16-BIT 500-MSPS 2쨈??쨈 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5687IPZP TI-DAC5687IPZP Datasheet
2Mb / 79P
[Old version datasheet]   16-BIT, 500 MSPS 2?? INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5687IPZPG4 TI-DAC5687IPZPG4 Datasheet
2Mb / 79P
[Old version datasheet]   16-BIT, 500 MSPS 2?? INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
More results

Description similaire - DAC5687

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
DAC5688 TI-DAC5688_10 Datasheet
1Mb / 55P
[Old version datasheet]   DUAL-CHANNEL, 16-BIT, 800 MSPS, 2x-8x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5689 TI-DAC5689 Datasheet
1Mb / 48P
[Old version datasheet]   16-BIT 800 MSPS 2x-8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5688 TI-DAC5688 Datasheet
1Mb / 47P
[Old version datasheet]   16-BIT, 800 MSPS 2x-8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC3282 TI-DAC3282 Datasheet
1Mb / 49P
[Old version datasheet]   16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)
DAC3282 TI-DAC3282_10 Datasheet
1Mb / 51P
[Old version datasheet]   16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)
DAC3282_101 TI-DAC3282_101 Datasheet
1Mb / 53P
[Old version datasheet]   16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)
DAC5689 TI-DAC5689_15 Datasheet
1Mb / 50P
[Old version datasheet]   16-BIT, 800 MSPS 2x??x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5688 TI1-DAC5688_14 Datasheet
1Mb / 57P
[Old version datasheet]   DUAL-CHANNEL, 16-BIT, 800 MSPS, 2x??x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5687IPZPR TI-DAC5687IPZPR Datasheet
2Mb / 79P
[Old version datasheet]   16-BIT, 500 MSPS 2?? INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC3282 TI-DAC3282_15 Datasheet
1Mb / 65P
[Old version datasheet]   DAC3282 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com