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TC94A23F Datasheet(Fiches technique) 6 Page - Toshiba Semiconductor

Numéro de pièce TC94A23F
Description  Single-chip CD Processor with Built-in Controller
Télécharger  20 Pages
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Fabricant  TOSHIBA [Toshiba Semiconductor]
Site Internet  http://www.semicon.toshiba.co.jp/eng
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TC94A23F Datasheet(HTML) 6 Page - Toshiba Semiconductor

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TC94A23F
2002-02-06
6
Pin
Number
Symbol
Pin Name
Function and Operation
Remarks
1~9
S1/OT4
~
S9/OT13
LCD segment output
/output port
10
S10/OT14
/ZDET
11
S11/OT15
/CLCK
12
S12/OT16
/DATA
13
S13/OT17
/SFSY
14
S14/OT18
/LRCK
LCD segment output
/output port
/CD signal
15
P8-0/S15
/BCK
16
P8-1/S16
/AOUT
17
P8-2/S17
/MBOV
18
P8-3/S18
/IPF
I/O port
/LCD segment output
/CD signal
Segment signal output pins for the LCD panel.
Those pins configure a matrix with COM1 to
COM4 and display up to 72 segments.
When the 1/2 bias method is set, two levels,
MVDD and GND, are output. When the 1/3
bias method is set four levels, MVDD,
1/3MVDD, 2/3MVDD, and GND, are output.
The S1 to S14 pins can be switched to an
output port (Note 1) by program. Port 8 and
S15 to S18 pins can be switched pin by pin to
an I/O port and segment output pins. When
the pins are set to an I/O port, output is
N-channel open drain.
The S10 to S14 and P8-0 to P8-3 pins can be
switched to CD signal input/output pins by
program. Setting the CD10 bit to 1 switches
the pins to the LRCK, BCK, and AOUT pins as
the CD pins in batches. The other pins can be
individually switched according to the
S14/S15/S16 segment data.
CLCK: Inputs/outputs sub code P to W data
reading clock.
DATA: Outputs sub code P to W data.
SFSY: Outputs frame sync signal for
playback.
LRCK: Outputs channel clock (44.1 kHz).
When L channel, outputs Low. When
R channel, outputs High. The polarity
can be inverted by command.
BCK:
Outputs bit clock (1.4112 MHz).
AOUT: Outputs audio data.
MBOV: Outputs buffer-memory-overflow
signal. When buffer memory
overflows, outputs H.
IPF:
Outputs interpolation pointing flag. If
AOUT output is C2 error
detection/correction, outputs High to
indicate correction is impossible.
ZDET: Outputs 1-bit DAC zero detection flag.
Pins set as an output port are used for
segment output for the LED driver. The output
port can increment OT1 to OT18 by
instruction, facilitating access to data in
external RAM and ROM.
(Note 1) After a system reset, pins also used
as output ports are set to LCD
output; pins also used as I/O ports
are set to I/O port input.
MVDD
MVDD
Bias
voltage
MVDD
MVDD
Bias
voltage
Input
instruction
MVDD


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