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AD9175 Fiches technique(PDF) 90 Page - Analog Devices |
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AD9175 Fiches technique(HTML) 90 Page - Analog Devices |
90 / 150 page AD9175 Data Sheet Rev. A | Page 90 of 150 Addr. Name Bits Bit Name Settings Description Reset Access 0x020 IRQ_ENABLE [7:5] RESERVED Reserved. 0x0 R 4 EN_SYSREF_JITTER Enable SYSREF± jitter interrupt. 0x0 R/W 3 EN_DATA_READY Enable JESD204B receiver ready (JRX_DATA_READY) low interrupt. 0x0 R/W 2 EN_LANE_FIFO Enable lane FIFO overflow/underflow interrupt. 0x0 R/W 1 EN_PRBSQ Enable PRBS imaginary error interrupt. 0x0 R/W 0 EN_PRBSI Enable PRBS real error interrupt. 0x0 R/W 0x021 IRQ_ENABLE0 [7:4] RESERVED Reserved. 0x0 R 3 EN_DAC0_CAL_ DONE Enable DAC0 calibration complete interrupt. 0x0 R/W [2:1] RESERVED Reserved. 0x0 R/W 0 EN_PAERR0 Enable PA protection error interrupt for DAC0. 0x0 R/W 0x022 IRQ_ENABLE1 [7:4] RESERVED Reserved. 0x0 R 3 EN_DAC1_CAL_ DONE Enable DAC1 calibration complete interrupt. 0x0 R/W [2:1] RESERVED Reserved. 0x0 R/W 0 EN_PAERR1 Enable PA protection error interrupt for DAC1. 0x0 R/W 0x023 IRQ_ENABLE2 [7:6] RESERVED Reserved. 0x0 R 5 EN_DLL_LOST Enable DLL lock lost interrupt. 0x0 R/W 4 EN_DLL_LOCK Enable DLL lock interrupt. 0x0 R/W [3:2] RESERVED Reserved. 0x0 R/W 1 EN_PLL_LOST Enable PLL lock lost interrupt. 0x0 R/W 0 EN_PLL_LOCK Enable PLL lock interrupt. 0x0 R/W 0x024 IRQ_STATUS [7:5] RESERVED Reserved. 0x0 R 4 IRQ_SYSREF_ JITTER SYSREF± jitter too large. If EN_SYSREF_ JITTER is low, IRQ_SYSREF_JITTER shows the current status. If EN_SYSREF_JITTER is high, IRQ_SYSREF_JITTER latches and pulls the IRQx pin low (x = the MUX_SYSREF_ JITTER setting). Writing a 1 to IRQ_ SYSREF_JITTER when latched clears the bit. 0x0 R/W 3 IRQ_DATA_READY JESD204x receiver data ready is low. If EN_DATA_READY is low, IRQ_DATA_READY shows the current status. If EN_DATA_ READY is high, IRQ_DATA_READY latches and pulls the IRQx pin low (x = MUX_ DATA_READY setting). Writing a 1 to IRQ_ DATA_READY when latched clears the bit. 0x0 R/W 2 IRQ_LANE_FIFO Lane FIFO overflow/underflow. If EN_ LANE_FIFO is low, IRQ_LANE_FIFO shows the current status. If EN_LANE_FIFO is high, IRQ_LANE_FIFO latches and pulls the IRQx pin low (x = MUX_LANE_FIFO setting). Writing a 1 to IRQ_LANE_FIFO when latched clears the bit. 0x0 R/W 1 IRQ_PRBSQ DAC1 PRBS error. If EN_PRBSQ is low, IRQ_PRBSQ shows the current status. If EN_PRBSQ is high, IRQ_PRBSQ latches and pulls the IRQx pin low (x = MUX_PRBSQ setting). Writing a 1 to IRQ_PRBSQ when latched clears the bit. 0x0 R/W |
Numéro de pièce similaire - AD9175 |
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Description similaire - AD9175 |
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