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AD9174 Fiches technique(PDF) 57 Page - Analog Devices |
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AD9174 Fiches technique(HTML) 57 Page - Analog Devices |
57 / 164 page Data Sheet AD9174 Rev. A | Page 57 of 164 MAIN DIGITAL DATAPATH 1× RAMP UP/DOWN GAIN 2× 3× 2× 2× TO ANALOG DAC CORE FROM CHANNELIZER OUTPUT MUX NCO PA PROTECTION Figure 75. Block Diagram of the Main Digital Datapath per Main DAC Output Each main digital datapath consists of a power amplifier (PA) protection block, a set of complex interpolation filters, a 48-bit complex main datapath NCO, and a ramp-up/ramp-down gain stage. The main datapaths are bypassable (1× interpolation selected), which bypasses all the digital processing blocks included in the main datapath. The interpolation selection is set to the same value for all main datapaths and cannot be independently controlled. However, the PA protection block, complex NCO settings, and gain ramp can all be configured independently. The controls for these blocks are paged by the main DAC datapath paging mask, MAINDAC_PAGE (Register 0x008, Bits[7:6]), as listed in Table 41. Each bit of the page mask corresponds to a main DAC datapath. The datapaths can be either paged individually to apply settings that are unique to a specific main datapath, or can be paged as a group to address both datapaths using a single set of SPI writes. Table 41. Main DAC Datapath Page Mask MAINDAC_PAGE (Register 0x008, Bits[7:6]) DAC Paged DAC Datapath Updated 0x40 (Bit 6) DAC0 DAC0 0x80 (Bit 7) DAC1 DAC1 Each digital block in the main datapath is described in more detail in the following sections. Downstream Protection (PA Protection) The AD9174 has several circuits designed to quickly reduce (or squelch) the amplitude of the samples that are to arrive at either DAC core, and thus protect PAs or other external system components located downstream from the AD9174 outputs. The DACx outputs can be either gradually ramped up or ramped down, or turned on or off in response to the following trigger signals, as shown in Figure 76: • PDP_PROTECT. This signal asserts when the calculated digital sample amplitude exceeds a programmable threshold. • INTERFACE_PROTECT. This signal asserts when specific JESD204B errors occur. • SPI_PROTECT. This signal asserts when the user writes the SPI control register directly. • BSM_PROTECT. This signal triggers the blanking state machine (BSM) module, which flushes the datapath on the rising edge of the TXEN0 or TXEN1 signal, which may come from a SPI write or the external TXEN0 or TXEN1 pin. A number of flags are raised in response to the trigger events, that can also be routed to the IRQx I/O pins (IRQ0 and IRQ1), to possibly shut down other external downstream components or simply serve as indicators. The DAC output on/off feature is similarly implemented through a feedforward trigger signal to the ramp-up/ramp- down digital gain block at the end of the main datapath before the analog DAC core, which allows the DAC to be turned on or off gradually (or quickly). |
Numéro de pièce similaire - AD9174_V01 |
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Description similaire - AD9174_V01 |
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