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AD4112 Fiches technique(PDF) 10 Page - Analog Devices

No de pièce AD4112
Description  Single Supply, 24-Bit, Sigma-Delta ADC
Download  58 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD4112 Fiches technique(HTML) 10 Page - Analog Devices

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AD4112
Data Sheet
Rev. A | Page 10 of 58
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
AVDD to AVSS
−0.3 V to +6.5 V
AVDD to DGND
−0.3 V to +6.5 V
IOVDD to DGND
−0.3 V to +6.5 V
IOVDD to AVSS
−0.3 V to +7.5 V
AVSS to DGND
−3.25 V to +0.3 V
VINx to AVSS
−50 V to +50 V
IINx+ to AVSS
−0.3 V to AVDD + 0.3 V
IINx− to AVSS
−0.3 V to AVDD + 0.3 V
Current Input Current1
−50 mA to +50 mA
Reference Input Voltage to AVSS
−0.3 V to AVDD + 0.3 V
Digital Input Voltage to DGND
−0.3 V to IOVDD + 0.3 V
Digital Output Voltage to DGND
−0.3 V to IOVDD + 0.3 V
Digital Input Current
10 mA
Operating Temperature Range
−40°C to +105°C
Storage Temperature Range
−65°C to +150°C
Maximum Junction Temperature
150°C
Lead Soldering, Reflow Temperature
260°C
1
The absolute maximum current input current, current input voltage, and
IINx− voltage must all be within the specified limits.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θJA is specified for a device soldered on a JEDEC test board for
surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
Unit
CP-40-151
4-Layer JEDEC Board
34
°C/W
1
Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with 16 thermal vias. See JEDEC JESD51.
ESD CAUTION


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