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NUC120-LB3C Fiches technique(PDF) 81 Page - Nuvoton Technology Corporation |
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NUC120-LB3C Fiches technique(HTML) 81 Page - Nuvoton Technology Corporation |
81 / 107 page NUC100/120xxxDN Aug 31, 2015 Page 81 of 107 Rev 1.01 PS/2 Device Controller (PS2D) 6.16 6.16.1 Overview The PS/2 device controller provides a basic timing control for PS/2 communication. All communication between the device and the host is managed through the CLK and DATA pins. Unlike PS/2 keyboard or mouse device controller, the receive/transmit code needs to be translated as meaningful code by firmware. The device controller generates the CLK signal after receiving a “Request to Send” state, but host has ultimate control over communication. Data of DATA line sent from the host to the device is read on the rising edge and sent from the device to the host is change after rising edge. A 16 bytes FIFO is used to reduce CPU intervention. Software can select 1 to 16 bytes for a continuous transmission. 6.16.2 Features Host communication inhibit and Request to Send state detection Reception frame error detection Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention Double buffer for data reception Software override bus |
Numéro de pièce similaire - NUC120-LB3C |
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Description similaire - NUC120-LB3C |
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