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NUC100-LE2E Fiches technique(PDF) 56 Page - Nuvoton Technology Corporation |
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NUC100-LE2E Fiches technique(HTML) 56 Page - Nuvoton Technology Corporation |
56 / 89 page NuMicro ™ NUC120 Data Sheet Publication Release Date: Jan. 2, 2012 - 56 - Revision V2.03 s APB devices and Memory. top the PDMA operation by disable PDMA [PDMACEN]. The CPU can recognize re polling or when it receives an internal PDMA urce or destination address or fixed them as well. ensity only has 1 PDMA channel (channel 0). 5.17.2 an support a unidirectional transfer (NuMicro ™ NUC100/NUC120 Low Density only has 1 PDMA channel) AMBA AHB master/slave interface compatible, for data transfer and register read/write Support source and destination address increased mode or fixed mode Hardware channel priority. DMA channel 0 has the highest priority and channel 8 has the lowest priority 5.17 PDMA Controller (PDMA) 5.17.1 Overview NuMicro ™ NUC100/NUC120 Medium Density contains a peripheral direct memory access (PDMA) controller that transfers data to and from memory or transfer data to and from APB devices. The PDMA has nine channels of DMA (Peripheral-to-Memory or Memory-to-Peripheral or Memory-to-Memory). For each PDMA channel (PDMA CH0~CH8), there is one word buffer as transfer buffer between the Peripheral Software can s the completion of a PDMA operation by softwa interrupt. The PDMA controller can increase so Notice: NuMicro ™ NUC100/NUC120 Low D Features Up to nine DMA channels. Each channel c |
Numéro de pièce similaire - NUC100-LE2E |
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Description similaire - NUC100-LE2E |
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