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NUC130-LC2C Datasheet(Fiches technique) 78 Page - Nuvoton Technology Corporation

Numéro de pièce NUC130-LC2C
Description  NuMicro
Télécharger  97 Pages
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Fabricant  NUVOTON [Nuvoton Technology Corporation]
Site Internet  http://www.nuvoton.com
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NUC130-LC2C Datasheet(HTML) 78 Page - Nuvoton Technology Corporation

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NuMicro NUC230/240 Datasheet
Dec. 30, 2014
Page 78 of 97
Revision 1.01
6.20 Controller Area Network (CAN)
6.20.1 Overview
The C_CAN consists of the CAN Core, Message RAM, Message Handler, Control Registers and
Module Interface (Refer 錯誤! 找不到參照來源。). The CAN Core performs communication
according to the CAN protocol version 2.0 part A and B. The bit rate can be programmed to
values up to 1MBit/s. For the connection to the physical layer, additional transceiver hardware is
required.
For communication on a CAN network, individual Message Objects are configured. The Message
Objects and Identifier Masks for acceptance filtering of received messages are stored in the
Message RAM. All functions concerning the handling of messages are implemented in the
Message Handler. These functions include acceptance filtering, the transfer of messages
between the CAN Core and the Message RAM, and the handling of transmission requests as well
as the generation of the module interrupt.
The register set of the C_CAN can be accessed directly by the software through the module
interface. These registers are used to control/configure the CAN Core and the Message Handler
and to access the Message RAM.
6.20.2 Features
Supports CAN protocol version 2.0 part A and B.
Bit rates up to 1 MBit/s.
32 Message Objects.
Each Message Object has its own identifier mask.
Programmable FIFO mode (concatenation of Message Objects).
Maskable interrupt.
Disabled Automatic Re-transmission mode for Time Triggered CAN applications.
Programmable loop-back mode for self-test operation.
16-bit module interfaces to the AMBA APB bus.
Supports wake-up function
6.21 Analog-to-Digital Converter (ADC)
6.21.1 Overview
The NuMicro
 NUC230/240 series contains one 12-bit successive approximation analog-to-
digital converters (SAR A/D converter) with 8 input channels. The A/D converter supports three
operation modes: single, single-cycle scan and continuous scan mode. The A/D converter can be
started by software, PWM Center-aligned trigger and external STADC pin.
6.21.2 Features
Analog input voltage range: 0~VREF
12-bit resolution and 10-bit accuracy is guaranteed
Up to 8 single-end analog input channels or 4 differential analog input channels


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