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M054ZBN Fiches technique(PDF) 41 Page - Nuvoton Technology Corporation |
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M054ZBN Fiches technique(HTML) 41 Page - Nuvoton Technology Corporation |
41 / 71 page NuMicro ™ M052/M054BN Datasheet Publication Release Date: Mar. 19, 2012 - 41 - Revision V1.01 6.5.2 Features The I 2C bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus. The main features of the bus are: Support Master and Slave mode Bidirectional data transfer between masters and slaves Multi-master bus (no central master) Arbitration between simultaneously transmitting masters without corruption of serial data on the bus Serial clock synchronization allows devices with different bit rates to communicate via one serial bus Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer Built-in a 14-bit time-out counter will request the I 2C interrupt if the I2C bus hangs up and timer-out counter overflows. External pull-up are needed for high output Programmable clocks allow versatile rate control Supports 7-bit addressing mode I 2C-bus controllers support multiple address recognition ( Four slave address with mask option) |
Numéro de pièce similaire - M054ZBN |
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Description similaire - M054ZBN |
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