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TPS71319 Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce TPS71319
Description  Dual 250 mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator with Integrated SVS
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS71319 Fiches technique(HTML) 4 Page - Texas Instruments

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Current
Limit
Thermal
Shutdown
V
REF
1.225 V
UVLO
30
µA
90 k
EN1
OUT1
IN
Current
Limit
OUT2
NR
EN2
250 k
Quickstart
5 pF
TPS713xx
Fixed/Fixed
FB2
RESET
0.95
× V
REF
100 ms
Delay
(V
FB2 Rising)
TPS71319
TPS71334
SBVS055A – DECEMBER 2004 – REVISED JANUARY 2005
FUNCTIONAL BLOCK DIAGRAM
Table 1. TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
DRC
IN
1
Unregulated input supply. A 0.1 µF capacitor should be connected from IN to GND.
GND
5, Pad
Ground
Output of the regulator. A small 2.2 µF ceramic capacitor is required from this pin to ground to assure
OUT1
3
stability.
OUT2
4
Same as OUT1 but for LDO2.
Driving the enable pin (EN) high turns on LDO1. Driving this pin low puts LDO1 into shutdown mode,
EN1
10
reducing operating current. The enable pin should be connected to IN if not used.
EN2
8
Same as EN1 but controls LDO2.
NC
9
No connection.
FB2/NC
7
Feedback for CH2 adjustable version; no connection for non-adjustable CH2.
NR
6
Noise reduction pin; connect an external bypass capacitor to reduce LDO output noise.
Open-drain reset output; monitors OUT2. A 10 k
Ω to 1 MΩ pull-up resistor is suitable for most
RESET
2
applications. The open-drain RESET pull-up voltage should not exceed VDD + 0.3 V.
4


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