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ZL40121 Fiches technique(PDF) 2 Page - Zarlink Semiconductor Inc

No de pièce ZL40121
Description  Low Power,Current Feedback Dual Operational Amplifier
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Fabricant  ZARLINK [Zarlink Semiconductor Inc]
Site Internet  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL40121 Fiches technique(HTML) 2 Page - Zarlink Semiconductor Inc

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ZL40121
Data Sheet
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Zarlink Semiconductor Inc.
Application Notes
Current Feedback Op Amps
Current feedback op amps offer several advantages over voltage feedback amplifiers:
• AC bandwidth not dependent on closed loop gain
• High Slew Rate
• Fast settling time
The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low
impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance
amplifier which can be considered to have gain
where Zo is the DC gain.
It can be shown that the closed loop non-inverting gain is given by
where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by
and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain.
This can readily be seen from the performance characteristic frequency response graph with varying Rf
It can be shown that increasing the value of Rf
• Increases closed loop stability
• Decreases loop gain
• Decreases bandwidth
• Reduces gain peaking
• Reduces overshoot
Using a resistor value of Rf=510Ω for Av=+2 V/V gives good stability and bandwidth. However since requirements
for stability and bandwidth vary it may be worth some experimentation to find the optimal Rf for a given application.
Layout Considerations
Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence
over high frequency operation for this device. This is particularly important for high performance current feedback
opamps. The Zarlink evaluation board serves as a good example layout that should be copied. The following
guidelines should be followed:
• Include 6.8uF tantalum and 0.1uF ceramic capacitors on both positive and negative supplies
• Remove the ground plane under and around the part, especially near the input and output pins to reduce
parasitic capacitances
• Minimize all trace lengths to reduce series inductance
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