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74HC243DB Fiches technique(PDF) 1 Page - NXP Semiconductors |
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74HC243DB Fiches technique(HTML) 1 Page - NXP Semiconductors |
1 / 17 page 1. General description The 74HC243 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC243 is specified in compliance with JEDEC standard no. 7A. The 74HC243 is a quad bus transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74HC243 is designed for 4-line asynchronous 2-way data communications between data buses. The output enable inputs (OEA and OEB) can be used to isolate the buses. The 74HC243 is similar to the 74HC242 but has non-inverting (true) outputs. 2. Features s Non-inverting 3-state outputs s 2-way asynchronous data bus communication s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from −40 °Cto+80 °C and from −40 °C to +125 °C. 74HC243 Quad bus transceiver; 3-state Rev. 03 — 12 November 2004 Product data sheet |
Numéro de pièce similaire - 74HC243DB |
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Description similaire - 74HC243DB |
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