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LM3501 Fiches technique(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
No de pièce LM3501
Description  Synchronous Step-up DC/DC Converter for White LED Applications
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3501 Fiches technique(HTML) 5 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
Specifications in standard type face are for T
J = 25˚C and those in boldface type apply over the full Operating Temperature
Range (T
J = −40˚C to +125˚C). Unless otherwise specified VIN =2.7V and specifications apply to both LM3501-16 and
LM3501-21.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 7)
Max
(Note 6)
Units
R
DSON
NMOS Switch R
DSON
V
IN = 2.7V, ISW = 300 mA
0.43
PMOS Switch R
DSON
V
OUT = 6V, ISW = 300 mA
1.3
2.3
D
Limit
Duty Cycle Limit
(LM3501-16)
FB=0V
87
%
Duty Cycle Limit
(LM3501-21)
FB=0V
94
F
SW
Switching Frequency
0.8
1.0
1.2
MHz
I
SD
SHDN Pin Current (Note 9)
SHDN = 5.5V
1.8
4
µA
SHDN = 2.7V
1
2.5
SHDN = GND
0.1
I
CNTRL
CNTRL Pin Current (Note 9)
V
CNTRL = 2.7V
10
20
µA
V
CNTRL =1V
4
15
I
L
Switch Leakage Current
(LM3501-16)
V
SW = 15V
0.01
0.5
µA
Switch Leakage Current
(LM3501-21)
V
SW = 20V
0.01
2.0
UVP
Input Undervoltage Lockout
ON Threshold
2.4
2.5
2.6
V
OFF Threshold
2.3
2.4
2.5
OVP
Output Overvoltage Protection
(LM3501-16)
ON Threshold
15
15.5
16
V
OFF Threshold
14
14.6
15
Output Overvoltage Protection
(LM3501-21)
ON Threshold
20
20.5
21
OFF Threshold
19
19.5
20
I
Vout
V
OUT Leakage Current
(LM3501-16)
V
OUT = 15V, SHDN = 1.5V
260
400
µA
V
OUT Leakage Current
(LM3501-21)
V
OUT = 20V, SHDN = 1.5V
300
460
I
VL
PMOS Switch Leakage Current
(LM3501-16)
V
OUT = 15V, VSW =0V
0.01
3
µA
PMOS Switch Leakage Current
(LM3501-21)
V
OUT = 20V, VSW =0V
0.01
3
CNTRL
Threshold
LED power off
75
mV
LED power on
125
SHDN
Threshold
SHDN low
0.65
0.3
V
SHDN High
1.1
0.65
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: This condition applies if VIN < VOUT.IfVIN > VOUT, a voltage greater than VIN + 0.3V should not be applied to the VOUT or VSW pins.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 4: The maximum allowable power dissipation is a function of the maximum operating junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance,
θJA, and the ambient temperature, TA. See the Thermal Properties section for the thermal resistance. The maximum allowable power dissipation at any
ambient temperature is calculated using: PD (MAX) = (TJ(MAX) −TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature.
Note 5: Junction-to-ambient thermal resistance (
θJA) is highly application and board-layout dependent. The 75oC/W figure provided was measured on a 4-layer test
board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues when
designing the board layout.
Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 7: Typical numbers are at 25˚C and represent the most likely norm.
Note 8: Feedback current flows out of the pin.
Note 9: Current flows into the pin.
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