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74AHC2G32DC Fiches technique(PDF) 1 Page - NXP Semiconductors |
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74AHC2G32DC Fiches technique(HTML) 1 Page - NXP Semiconductors |
1 / 16 page 1. General description The 74AHC2G/AHCT2G32 is a high-speed Si-gate CMOS device. This device provides two 2-input OR gates. 2. Features s Symmetrical output impedance s High noise immunity s ESD protection: x HBM EIA/JESD22-A114-A exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V x CDM EIA/JESD22-C101 exceeds 1000 V. s Low power dissipation s Balanced propagation delays s SOT505-2 and SOT765-1 package s Specified from −40 °Cto+85 °C and −40 °C to +125 °C. 3. Quick reference data [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Rev. 01 — 23 February 2004 Product data sheet Table 1: Quick reference data GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit Type 74AHC2G tPHL, tPLH propagation delay nA and nB to nY CL =15pF; VCC =5V - 3.2 5.5 ns CI input capacitance - 1.5 10 pF CPD power dissipation capacitance CL =50pF; fi = 1 MHz [1] [2] -16 - pF Type 74AHCT2G tPHL, tPLH propagation delay nA and nB to nY CL =15pF; VCC =5V - 3.3 6.9 ns CI input capacitance - 1.5 10 pF CPD power dissipation capacitance CL =50pF; fi = 1 MHz [1] [2] -17 - pF |
Numéro de pièce similaire - 74AHC2G32DC |
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Description similaire - 74AHC2G32DC |
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