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TPA28F400BV-T80 Fiches technique(PDF) 7 Page - Intel Corporation |
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TPA28F400BV-T80 Fiches technique(HTML) 7 Page - Intel Corporation |
7 / 55 page E 2-MBIT SmartVoltage BOOT BLOCK FAMILY 7 SEE NEW DESIGN RECOMMENDATIONS The 2-Mbit boot block flash memory family provides full-function, blocked flash memories suitable for a wide range of applications. These applications include extended PC BIOS and ROM-able applications storage, digital cellular phone program and data storage, telecommunication boot/firmware, printer firmware/font storage and various other embedded applications where program and data storage are required. Reprogrammable systems, such as personal computers, are ideal applications for the 2-Mbit flash memory products. Increasing software sophistication greatens the probability that a code update will be required after the PC is shipped. For example, the emerging of “plug and play” standard in desktop and portable PCs enables auto- configuration of ISA and PCI add-in cards. However, since the plug and play specification continues to evolve, a flash BIOS provides a cost- effective capability to update existing PCs. In addition, the parameter blocks are ideal for storing the required auto-configuration parameters, allowing you to integrate the BIOS PROM and parameter storage EEPROM into a single component, reducing parts costs while increasing functionality. The 2-Mbit flash memory products are also excellent design solutions for digital cellular phone and telecommunication switching applications requiring very low power consumption, high- performance, high-density storage capability, modular software designs, and a small form factor package. The 2-Mbit’s blocking scheme allows for easy segmentation of the embedded code with 16 Kbytes of hardware-protected boot code, four main blocks of program code and two parameter blocks of 8 Kbytes each for frequently updated data storage and diagnostic messages (e.g., phone numbers, authorization codes). Intel’s boot block architecture provides a flexible voltage solution for the different design needs of various applications. The asymmetrically-blocked memory map allows the integration of several memory components into a single flash device. The boot block provides a secure boot PROM; the parameter blocks can emulate EEPROM functionality for parameter store with proper software techniques; and the main blocks provide code and data storage with access times fast enough to execute code in place, decreasing RAM requirements. 1.4 Pinouts Intel’s SmartVoltage Boot Block architecture provides upgrade paths in every package pinout to the 4 or 8-Mbit density. The 28F002B 40-lead TSOP pinout for space-constrained designs is shown in Figure 3. The 28F200 44-lead PSOP pinout follows the industry-standard ROM/EPROM pinout, as shown in Figure 4. For designs that require x16 operation but have space concerns, refer to the 48-lead pinout in Figure 5. Furthermore, the 28F200 56-lead TSOP pinout shown in Figure 6 provides compatibility with BX/BL family product packages. Pinouts for the corresponding 4-Mbit and 8-Mbit components are also provided for convenient reference. 2-Mbit pinouts are given on the chip illustration in the center, with 4-Mbit and 8-Mbit pinouts going outward from the center. |
Numéro de pièce similaire - TPA28F400BV-T80 |
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Description similaire - TPA28F400BV-T80 |
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