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CS61582-IQ5 Fiches technique(PDF) 10 Page - Cirrus Logic

No de pièce CS61582-IQ5
Description  DUAL T1/E1 LINE INTERFACE
Download  32 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61582-IQ5 Fiches technique(HTML) 10 Page - Cirrus Logic

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background image
matically adjusts the pulse width based on the
configuration selection.
The transmitter impedance changes with the line
length options in order to match the load imped-
ance (75
Ω for E1 coax, 100Ω for T1, 120Ω for
E1 shielded twisted pair), providing a minimum
of 14 dB return loss for T1 and E1 frequencies
during the transmission of both marks and
spaces. This improves signal quality by minimiz-
ing reflections from the transmitter. Impedance
matching also reduces load power consumption
by a factor of two when compared to the return
loss achieved by using external resistors.
The CS61582 driver will automatically detect an
inactive TLCK input (i.e., no valid data is being
clocked to the driver). When this condition is de-
tected, the driver is forced low (except during
remote loopback) to output spaces and prevent
TTIP and TRING from entering a constant trans-
mit-mark state.
When the transmit configuration established by
CON[2:0], TAOS, or LLOOP changes state, the
transmitter stabilizes within 22 TCLK bit peri-
ods. The transmitter takes longer to stabilize
when RLOOP1 or RLOOP2 is selected because
the timing circuitry must adjust to the new fre-
quency from RCLK.
When the transmitter transformer secondaries are
shorted through a 0.5 ohm resistor, the transmit-
ter will output a maximum of 50 mA-rms, as
required by European specification BS6450.
RECEIVER
The receiver extracts data and clock from the
T1/E1 signal on the line interface and outputs
clock and synchronized data to the system. The
signal is detected differentially across the receive
transformer and can be recovered over the entire
range of short haul cable lengths. The transmit
and receive transfomer specifications are identical
and are presented in the Applications section.
As shown in Table 1, the receiver slicing level is
set at 65% for DS1/DSX-1 short-haul and at
50% for all other applications.
500
1.0
0.5
0
-0.5
0
2 50
750
1000
NO RM A LIZ E D
AM PLIT U D E
CS 6 15 8 2
OU T P U T
PU L S E SH APE
T IM E (n ano sec onds)
AN SI T 1.102
SP EC IF IC AT IO N
Figure 5. Typical Pulse Shape at DSX-1 Cross Connect
269 ns
244 ns
194 ns
219 ns
488 ns
No m ina l P u ls e
0
10
50
80
90
100
110
120
-10
-20
Percent
of
no m inal
peak
voltage
G.70 3
SPEC IF IC ATIO N
Figure 6. Pulse Mask at the 2048 kbps Interface
10
DS224PP1


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