74VHC4046N datasheet(3/14 Pages) NSC

No de pièce	74VHC4046N

Description	CMOS Phase Lock Loop

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Fabricant	NSC [National Semiconductor (TI)]

Site Internet	http://www.national.com

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Absolute Maximum Ratings (Notes12)

Supply Voltage (VCC)

b

05 to a 70V

DC Input Voltage (VIN)

b

15 to VCC a15V

DC Output Voltage (VOUT)

b

05 to VCC a 05V

Clamp Diode Current (IIK IOK)

g

20 mA

DC Output Current per pin (IOUT)

g

25 mA

DC VCC or GND Current per pin (ICC)

g

50 mA

Storage Temperature Range (TSTG)

b

65 C a150 C

Power Dissipation (PD)

(Note 3)

600 mW

SO Package only

500 mW

Lead Temperature (TL)

(Soldering 10 seconds)

260 C

Operating Conditions

Min

Max

Units

Supply Voltage (VCC)2

6

V

DC Input or Output Voltage

0

VCC

V

(VIN VOUT)

Operating Temp Range (TA)

74VHC

b

40

a

85

C

Input Rise or Fall Times

(tr tf)VCCe20V

1000

ns

VCCe45V

500

ns

VCCe60V

400

ns

DC Electrical Characteristics (Note 4)

TAe25 C

74VHC

Symbol

Parameter

Conditions

VCC

TAeb40 to 85 C

Units

Typ

Guaranteed Limits

VIH

Minimum High Level Input

20V

15

V

Voltage

45V

315

V

60V

42

V

VIL

Maximum Low Level Input

20V

05

V

Voltage

45V

135

V

60V

18

V

VOH

Minimum High Level Output

VINeVIH or VIL

Voltage

lIOUTls20 mA

20V

20

19

V

45V

45

44

V

60V

60

59

V

VINeVIH or VIL

lIOUTls40 mA

45V

42

398

384

V

lIOUTls52 mA

60V

57

548

534

V

VOL

Maximum Low Level Output

VINeVIH or VIL

Voltage

lIOUTls20 mA

20V

0

01

V

45V

0

01

V

60V

0

01

V

VINeVIH or VIL

lIOUTls40 mA

45V

02

026

033

V

lIOUTls52 mA

60V

02

026

033

V

IIN

Maximum Input Current (Pins 359)

VINeVCC or GND

60V

g

01

g

10

m

A

IIN

Maximum Input Current (Pin 14)

VINeVCC or GND

60V

20

50

80

m

A

IOZ

Maximum TRI-STATE Output

VOUTeVCC or GND

60V

g

025

g

25

m

A

Leakage Current (Pin 13)

ICC

Maximum Quiescent Supply

VINeVCC or GND

60V

30

40

65

m

A

Current

IOUTe0 mA

VIN e VCC or GND

60V

600

750

1200

m

A

Pin 14 Open

Note 1

Maximum Ratings are those values beyond which damage to the device may occur

Note 2

Unless otherwise specified all voltages are referenced to ground

Note 3

Power Dissipation temperature derating

plastic ‘‘N’’ package b12 mW C from 65 Cto85 C

Note 4

For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for VHC at 45V Thus the 45V values should be used when

designing with this supply Worst case VIH and VIL occur at VCCe55V and 45V respectively (The VIH value at 55V is 385V) The worst case leakage current (IIN

ICC and IOZ) occur for CMOS at the higher voltage and so the 60V values should be used

3

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