 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
MCRF250 Fiches technique(PDF) 6 Page - Microchip Technology |
|
||||||||||||||||||||||||||||||
MCRF250 Fiches technique(HTML) 6 Page - Microchip Technology |
|
|
6 / 24 page  MCRF250 DS21267F-page 6 2003 Microchip Technology Inc. FIGURE 2-3: PSK DATA MODULATION 2.2.4 MEMORY ARRAY LOCK BIT (CB12) The CB12 must be ‘0’ for contactless programming (Blank). The bit (CB12) is automatically set to ‘1’ itself as soon as the device is programmed contactlessly. 2.3 Memory Section The device has 128 bits of one-time programmable (OTP) memory. The user can choose 96 or 128 bits by selecting the CB1 bit in the configuration register. See Table 2-1 for more details. 2.3.1 COLUMN AND ROW DECODER LOGIC AND BIT COUNTER The column and row decoders address the EEPROM array at the clock rate and generate a serial data stream for modulation. This data stream can be up to 128 bits in length. The size of the data stream is user programmable with CB1 and can be set to 96 or 128 bits. Data lengths of 48 and 64 bits are available by programming the data twice in the array, end-to-end. The column and row decoders route the proper voltage to the array for programming and reading. In the programming modes, each individual bit is addressed serially from bit 1 to bit 128. 2.4 Examples of Configuration Settings EXAMPLE 2-1: “48D” CONFIGURATION EXAMPLE 2-2: “40A” CONFIGURATION P P PP PP PP PP PP ‘0’ ‘0’ ‘1’ ‘1’ Encoded Data PSK_ 1 Change on Data PSK _2 Change on ‘1’ (NRZ_L) ‘1’ The “48D” (hex) configuration is interpreted as follows: Referring to Table 2-1, the “48D” configuration represents: Blank (not programmed) Device Anti-Collision Modulation = PSK_1 PSK rate = rf/2 Data encoding = NRZ_L (direct) Baud rate = rf/32 = MOD32 Memory size: 128 bits “48D” → 0100-1000-1101 CB12 CB1 The “40A” (hex) configuration is interpreted as follows: The MSB corresponds to CB12 and the LSB corresponds to CB1 of the configuration register. Therefore, we have: Referring to Table 2-1, the “40A” configuration represents: Not programmed device (blank), anticollision, FSK protocol, NRZ_L (direct) encoding, MOD50 (baud rate = rf/50), 96 bits. Note: The sample cards in the DV103002 kit are configured to “40A”. CB12=0 CB11=1 CB10=0 CB9=0 CB8=0 CB7=0 CB6=0 CB5=0 CB4=1 CB3=0 CB2=1 CB1=0 “40A” → 0100-0000-1010 CB12 CB1 |
Numéro de pièce similaire - MCRF250 |
|
Description similaire - MCRF250 |
|
|
Lien URL |
| Politique de confidentialité |
| ALLDATASHEET.FR |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
