ISL12057 datasheet(11/18 Pages) RENESAS

No de pièce	ISL12057

Description	Low Cost and Low Power I2C RTC Real Time Clock/Calendar with Alarm Function and Dual IRQ Pins

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ISL12057

FN6755 Rev 2.00

Page 11 of 18

Sep 25, 2015

NOTE: “X” is “Don’t care”; it can be set to 0 or 1.

Following is example of an Alarm1 Interrupt

: a single alarm will

occur on Monday at 11:30 a.m. (Monday is when DW = 2). Set

the Alarm1 registers as follows:

After these registers are set, an alarm is generated when the

RTC advances to exactly 11:30 a.m. on January 1 (after

seconds changes from 59 to 00) by setting the A1F bit in the

status register to “1”.

Alarm2 Registers

Addresses [Address 12h to 14h]

The Alarm2 register bytes are set up identically to the RTC

register bytes except that the MSB of each byte functions as

an enable bit (enable = “0”). These enable bits specify which

alarm registers (minutes, hour, and date/day) are used to make

the comparison. When all the enable bits are set to “1”, Alarm2

will trigger once per minute. Note that there are no alarm bytes

for seconds, month, and year.

The Alarm2 function works as a comparison between the

Alarm2 registers and the RTC registers. As the RTC advances,

Alarm2 is triggered when a match occurs between the Alarm2

registers and the RTC registers. Any one Alarm2 register,

multiple registers, or all registers can be enabled for a match.

To clear Alarm2, the A2F status bit must be set to “0” with a

write.

NOTE: “X” is “Don’t care”; it can be set to 0 or 1.

Following is example of Alarm2 Interrupt

: a single alarm will

occur on the first day of every month at 20:00 military time. Set

the Alarm2 registers as follows:

After these registers are set, an alarm is generated when the

RTC advances to exactly 20:00 on Monday (after minutes

changes from 59 to 00) by setting the A2F bit in the status

register to “1”.

I2C Serial Interface

The ISL12057 supports a bi-directional, bus-oriented protocol.

The protocol defines any device that sends data onto the bus

as a transmitter and the receiving device as the receiver. The

X

(see Note)

1101

Match Hour

0

1110

Match Date

1

1110

Match Day

0

0011

Match Second and Minute

0

0101

Match Second and Hour

0

0000

Match Second, Minute

and Hour

.

0

1000

Match Minute Hour and

Date

0

0000

Match Second, Minute

Hour and Date

.

1

1000

Match Minute, Hour, and

Day

1

0000

Match Second, Minute,

Hour, and Day

ALARM1

REGISTER

BIT

DESCRIPTION

76 543210 HEX

A1SC

10 000000

80h Seconds disabled

A1MN

00 110000

30h Minutes set to 30,

enabled

A1HR

01 010001

51h Hours set to 11am,

enabled

A1DW/DT 01 000010

42h Day set to 1,

enabled

TABLE 6. ALARM1 INTERRUPT WITH ENABLE BITS

SELECTION (Continued)

A1DW/DT A1M1 A1M2 A1M3 A1M4

ALARM1 INTERRUPT

TABLE 7. ALARM2 INTERRUPT WITH ENABLE BITS

SELECTION

A2DW/DT A2M2 A2M3 A2M4

ALARM2 INTERRUPT

X

(see Note)

1

Every Minute (Second=00)

X

0

1

Match Minute

X

1

0

1

Match Hour

0

1

0

Match Date

11

1

0

Match Day

X

0

1

Match Minute and Hour

0

1

0

Match Hour and Date

0

1

0

Match Minute and Date

0

Match Minute, Hour, and Date

1

0

1

0

Match Minute and Day

1

0

Match Hour and Day

1

0

Match Minute, Hour, and Day

ALARM2

REGISTER

BIT

DESCRIPTION

7 6543210 HEX

A2MN

1 0000000

80h Minutes disabled

A2HR

0 0100000

20h Hours set to 20,

enabled

A2DW/DT 0 0000001

01h Date set to 1st,

enabled

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