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LT1469-2 Fiches technique(PDF) 14 Page - Linear Technology |
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LT1469-2 Fiches technique(HTML) 14 Page - Linear Technology |
14 / 20 page LTC2645 14 2645fa For more information www.linear.com/LTC2645 operaTion sample/holdoperations.Anypairofrisingedgesseparated by less than the idle timeout delay t3 (50ms minimum) will cause the DAC code to be updated. Any pair of rising edges separated by more than t3 (70ms maximum) will be ignored and the DAC code will retain its previous value. Note that after power-on-reset or when INX idles low, the DAC will power down with a high impedance output. Short INX Period Operation The accuracy of the PWM to voltage conversion is guar- anteed for INX input frequencies up to 6.25 kHz (12-bit), 25kHz (10-bit) or 100kHz (8-bit). Faster INX input fre- quencies will proportionally decrease the resolution and accuracy of the analog output. For INX input periods of less than the computational delay t4(nominally3.2µs),the DAC update will be skipped and the DAC code will retain its previous value. Short INX Pulse-Width Operation Provide INX input high and low pulse widths greater than tPWH and tPWL to ensure that the DAC output is updated after every INX rising edge. High going pulses narrower than tPWH will cause the DAC code to be calculated as zero-scale, and low going pulses narrower than tPWL will cause the DAC code to be calculated as full-scale. For much narrower pulse widths of only a few nanoseconds, the input edge may not be recognized, in which case the DAC update will be skipped entirely and the DAC code will retain its previous value. Power-On Reset The LTC2645 resets the output to a known state when power is first applied, making system initialization con- sistent and repeatable. Connect the IDLSEL pin to GND or VCC according to Table 1 to cause the DACs to initialize to zero-scale or with the device powered down and the DAC outputs high impedance. For some applications, downstream circuits are active during DAC power-up, and may be sensitive to nonzero outputs from the DAC during this time. The LTC2645 contains circuitry to reduce the power-on glitch when zero-scale reset is selected: the analog output typically rises less than 5mV above zero-scale during power on if the power supply is ramped to 5V in 1ms or more. In general, the glitch amplitude decreases as the power sup- ply ramp time is increased. Reference Modes For applications where an accurate external reference is not available, nor desirable due to limited space, the LTC2645 has a user-selectable, integrated reference. Internal Reference mode can be selected by connecting the REFSEL pin to GND. The 10ppm/°C, 1.25V internal reference is available at the REF pin. This voltage is internally amplified by 2X to provide a 2.5V full-scale DAC output voltage range. Add- ing bypass capacitance to the REF pin will improve noise performance; 0.1µF is recommended, and up to 10µF can be driven without oscillation. The REF output must be buffered when driving an external DC load current. Alternatively, the DAC can operate in External Reference mode by connecting the REFSEL pin to VCC. In this mode, aninputvoltagesuppliedexternallytotheREFpinprovides the reference (1V ≤ VREF ≤ VCC) and the supply current is reduced. In this mode the full-scale DAC output voltage is equal to the voltage at the REF pin. Power-Down Mode For power constrained applications, power-down mode can be used to reduce the supply current whenever less than four DAC outputs are needed. When in power-down mode, the buffer amplifiers, bias circuits, and integrated reference circuits are disabled, and draw essentially zero current. |
Numéro de pièce similaire - LT1469-2 |
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Description similaire - LT1469-2 |
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