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LHC4913 Fiches technique(PDF) 3 Page - STMicroelectronics

No de pièce LHC4913
Description  3A POSITIVE LOW DROP VOLTAGE REGULATOR WITH INHIBIT FUNCTION
Download  6 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LHC4913 Fiches technique(HTML) 3 Page - STMicroelectronics

  LHC4913 Datasheet HTML 1Page - STMicroelectronics LHC4913 Datasheet HTML 2Page - STMicroelectronics LHC4913 Datasheet HTML 3Page - STMicroelectronics LHC4913 Datasheet HTML 4Page - STMicroelectronics LHC4913 Datasheet HTML 5Page - STMicroelectronics LHC4913 Datasheet HTML 6Page - STMicroelectronics  
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LHC4913 SERIES
3/6
APPLICATION DIAGRAM FOR REMOTE SENSINS OPERATION FOR ADJUSTABLE VERSION
FUNCTIONAL DESCRIPTION
ADJUSTABLE VERSION
The ADJUST pin shall be set at 1.225V with the
adequated fraction of VO generated by a resistive
divider inserted between VO and GND. The
ADJ-GROUND resistor value must not be greater
than 2.5 K
Ω.For a given V
O the following holds:
VO=VADJ(1+R2/R1).
OVERTEMPERATURE PROTECTION OPTION
The
LHC4913
is
protected
by
a
junction-
temperature detection circuit, turning the device
“OFF” when the temperature attains 175°C. The
recovery of the ON mode occurs with a hysteresys
of 40 °C.
OVERCURRENT PROTECTION
The device is equipped with a circuit having the
purpose of limiting the maximum load current, in
order to protect the output stage against possible
overcurrent-related damages. Its threshold can be
modified externally by means of a resistor put
between the pins SH-CNTRL and VI.
For this characteristic, when the load current gets
close to the above threshold, the regulation is
inhibited. Thus, an excellent operation is granted
only up to 66% of preset maximum current.
SHORT CIRCUIT MONITORING / SIGNALLING
In the event of an overcurrent at the output, a
voltage level of 0.4V is present at the OCM pin. In
others conditions, this voltage equals VI.
REMOTE SENSING FOR ADJ VERSION
As pointed out in the pin configuration plot, VO and
SENSE are not linked to each other in order to get
a regulation with a load located far away from the
chip. Under ordinary applications, the SENSE
shall be connected to both VO1 &VO2. To obtain
the best performances it is recommended to be
compliant with the configuration shown in the
figure at top page.
What can degrade the regulation performances of
this configuration is the variable voltage drop
between the chip ground and the load termination
Lv.
This is brought mostly by the current Ib coming
from the output power base and going to ground
through the driver stage. The degradation amount
to (1+R2/R1)x RW1 xIBmax +RW2 xIBmax
APPLICATION INFORMATION
Recommended VI=12V Max, VO= 1.225V Min.
The device is designed to operate with any VI-VO
value according to above mentioned and thermal
dissipation limits.
An input filtering capacitor of 100nF is always
mandatory.
The two VI pins shall always be connected in
parallel, this applies also for the four VO pins.
Device stability is granted in any circumstance
witha1
µF output capacitor.
The device operation is guaranteed with any
Vin-Vout
dropout
under
the
above
thermal
constraints.
Although
two
embedded
protections
first
mentioned
(the
overtemperature
and
the
overcurrent) ensure the L4913 integrity against
any fault load condition, it is recommended to
comply with the specified absolute maximum
ratings also in applications involving fast switching
of output currents.
To achieve this, a polyester capacitor of at least
470nF, put close to the regulator between input
and ground, improves the L4913 reliability by


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