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AK4376A Fiches technique(PDF) 49 Page - Asahi Kasei Microsystems |
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AK4376A Fiches technique(HTML) 49 Page - Asahi Kasei Microsystems |
49 / 68 page [AK4376A] 016014206-E-00 2016/11 - 49 - ■ Power-up & Operation Mode Power Down State (PDN pin = “L”) When the PDN pin is “L”, the AK4376A is in a power-down state. Power supplies must be applied when the PDN pin = “L”. Set the PDN pin to “H” to release the power-down state after all the power supplies are on. More than o ne tPDN cycle of “L” period is needed before releasing the power-down state. The state of the AK4376A transitions to LDO2 Ctrl state by bringing the PDN pin to “H”. LDO2 Ctrl State This is a state to control the LDO2. LDO2 is powered up and the internal DRSTN signal is changed from “L” to “H” after max. 1 ms, and the AK4376A enters a Standby state. Standby State I 2C interface is powered up and register accesses are enabled. *10ms (min.) wait time for power-up of analog circuit blocks (CP1, CP2, LDO1P, LDO1N, DAC, HP-Amp and PLL) is needed after setting the PDN pin to ”H” to release the power-down state. <State Transition Diagram> Figure 20. Device State Diagram 1. PDN pin “L” → “H” 2. Wait 1 ms until LDO2 1.2V output is stable. 3. Internal DRSTN Signal: “L” → “H” 4. Register Access Ready Power Down LDO2 Ctrl 1 ms Standby + V PDN pin = “H” PDN pin = “L” No DRSTN ↑ Yes |
Numéro de pièce similaire - AK4376A |
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Description similaire - AK4376A |
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