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OPT3001IDNPTQ1 Fiches technique(PDF) 3 Page - Texas Instruments |
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OPT3001IDNPTQ1 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 43 page 1 VDD 6 SDA 2 ADDR 5 INT 3 GND 4 SCL Not to scale Thermal Pad 3 OPT3001-Q1 www.ti.com SBOS853 – MARCH 2017 Product Folder Links: OPT3001-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 5 Pin Configuration and Functions DNP Package 6-Pin USON Top View Pin Functions PIN I/O DESCRIPTION NO. NAME 1 VDD I Device power. Connect to a 1.6-V to 3.6-V supply. 2 ADDR I Address pin. This pin sets the LSBs of the I2C address. 3 GND Power Ground 4 SCL I I2C clock. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply. 5 INT O Interrupt output, open-drain. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply. 6 SDA I/O I2C data. Connect with a 10-kΩ resistor to a 1.6-V to 5.5-V supply. |
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