TPS5615, TPS5618, TPS5625, TPS5633

SYNCHRONOUS-BUCK HYSTERETIC REGULATOR CONTROLLER

SLVS177B – SEPTEMBER 1998 – REVISED JULY 2000

6

POST OFFICE BOX 655303

detailed description (continued)

R2

+ 2.1

R1

V

TRIP

–2.1

Where

VTRIP=desired VSUPPLY trip voltage

R2

INHIBIT

TPS56xx

R1

To Power Stage

SHUTDOWN

VCC

Figure 4. Input Undervoltage Lockout Circuit Using INHIBIT

during power up. While the controller is disabled, the output drivers will be low and the slowstart capacitor will

normal converter operation begins. There is a 2-V hysteresis in the undervoltage lockout circuit for noise

immunity.

slowstart

ANAGND and is charged by an internal current source. The slowstart charging current is determined by the

following equation:

I

SLOWSTART +

I(VREFB)

5

where I(VREFB) is the current flowing out of VREFB. It is recommended that no additional loads be connected

to VREFB, other than the resistor divider for setting the hysteresis voltage. The maximum current that can be

sourced by the VREFB circuit is 500

µA. The slowstart time is set by:

t

SLOWSTART +

5

C

SLOWST

R

VREFB

power good

is pulled low. PWRGD is an open-drain output.

overvoltage protection

undervoltage lockout value. A 3-

µs deglitch timer is included for noise immunity. Refer to the LODRV section

for information on how to protect the load against overvoltages due to a shorted fault across the high-side power

FET.