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SLG46169 Fiches technique(PDF) 19 Page - Dialog Semiconductor |
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SLG46169 Fiches technique(HTML) 19 Page - Dialog Semiconductor |
19 / 102 page 000-0046169-105 Page 18 of 101 SLG46169 6.0 Summary of Macrocell Function 6.1 I/O Pins • Digital Input (low voltage or normal voltage, with or without Schmitt Trigger) • Open Drain Outputs • Push Pull Outputs • Analog I/O • 10 k /100 k/1 Mpull-up/pull-down resistors • 40 mA Open Drain 4X Drive output 6.2 Connection Matrix • Digital matrix for circuit connections based on user design 6.3 Analog Comparators (2 total) • Selectable hysteresis 0 mV/25 mV/50 mV/200 mV • Bandwidth control • Selectable gain 6.4 Voltage Reference • Used for references on Analog Comparators • Can also be driven to external pins 6.5 Combinational Logic Look Up Tables (LUTs – 9 total) • Two 2-bit Lookup Tables • Seven 3-bit Lookup Tables 6.6 Combination Function Macrocells (9 total) • Four Selectable DFF/Latch or 2-bit LUTs • Two Selectable DFF/Latch or 3-bit LUTs • One Selectable Pipe Delay or 3-bit LUT • Two Selectable CNT/DLY or 4-bit LUTs 6.7 Delays/Counters (5 total) • Two 14-bit delay/counters: Range 1-16384 clock cycles • Three 8-bit delays/counters: Range 1-255 clock cycles 6.8 Pipe Delay (Part of Combination Function Macrocell) • 16 stage / 3 output • One 1 stage fixed output • Two 1-16 stage selectable outputs. 6.9 Programmable Delay • 150 ns/300 ns/450 ns /600 ns @ 3.3 V • Includes Edge Detection function 6.10 Additional Logic Functions (4 total) • Two Inverter macrocells • Two Deglitch filter macrocells |
Numéro de pièce similaire - SLG46169 |
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Description similaire - SLG46169 |
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