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TC7MH163FK Fiches technique(PDF) 7 Page - Toshiba Semiconductor

No de pièce TC7MH163FK
Description  TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
Download  12 Pages
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Fabricant  TOSHIBA [Toshiba Semiconductor]
Site Internet  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC7MH163FK Fiches technique(HTML) 7 Page - Toshiba Semiconductor

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TC7MH161,163FK
2001-09-12
7
AC Characteristics (Input: tr
==== tf ==== 3 ns)
Ta
= 25°C
Ta
= -40~85°C
Characteristics
Symbol
Test Condition
VCC (V) CL (pF)
Min
Typ.
Max
Min
Max
Unit
15
¾
8.3
12.8
1.0
15.0
3.3
± 0.3
50
¾
10.8
16.3
1.0
18.5
15
¾
4.9
8.1
1.0
9.5
Propagation delay time
(CK-Q)
tpLH
tpHL
Figure 1, Figure 2
5.0
± 0.5
50
¾
6.4
10.1
1.0
11.5
ns
15
¾
8.7
13.6
1.0
16.0
3.3
± 0.3
50
¾
11.2
17.1
1.0
19.5
15
¾
4.9
8.1
1.0
9.5
Propagation delay time
(CK-CARRY)
[Count mode]
tpLH
tpHL
Figure 1
5.0
± 0.5
50
¾
6.4
10.1
1.0
11.5
ns
15
¾
11.0
17.2
1.0
20.0
3.3
± 0.3
50
¾
13.5
20.7
1.0
23.5
15
¾
6.2
10.3
1.0
12.0
Propagation delay time
(CK-CARRY)
[Preset mode]
tpLH
tpHL
Figure 2
5.0
± 0.5
50
¾
7.7
12.3
1.0
14.0
ns
15
¾
7.5
12.3
1.0
14.5
3.3
± 0.3
50
¾
10.5
15.8
1.0
18.0
15
¾
4.9
8.1
1.0
9.5
Propagation delay time
(ENT-CARRY)
tpLH
tpHL
Figure 6
5.0
± 0.5
50
¾
6.4
10.1
1.0
11.5
ns
15
¾
8.9
13.6
1.0
16.0
3.3
± 0.3
50
¾
11.2
17.1
1.0
19.5
15
¾
5.5
9.0
1.0
10.5
Propagation delay time
( CLR -Q)
tpHL
Figure 4
(Note4)
5.0
± 0.5
50
¾
7.0
11.0
1.0
12.5
ns
15
¾
8.4
13.2
1.0
15.5
3.3
± 0.3
50
¾
10.9
16.7
1.0
19.0
15
¾
5.0
8.6
1.0
10.0
Propagation delay time
( CLR -CARRY)
tpHL
Figure 4
(Note4)
5.0
± 0.5
50
¾
6.5
10.6
1.0
12.0
ns
15
80
130
¾
70
¾
3.3
± 0.3
50
55
85
¾
50
¾
15
135
185
¾
115
¾
Maximum clock frequency
fmax
¾
5.0
± 0.5
50
95
125
¾
85
¾
MHz
Input capacitance
CIN
¾
¾
4
10
¾
10
pF
Power dissipation
capacitance
CPD
(Note3)
¾
23
¾
¾
¾
pF
Note3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC
When the outputs drive a capacitive load, total current consumption is the sum of CPD, and DICC which is
obtained from the following formula:
DICC = fCK･VCC
÷
ø
ö
ç
è
æ
+
+
+
+
16
C
16
C
8
C
4
C
2
C
CO
QD
QC
QB
QA
CQA~CQD and CCO are the capacitance QA~QD and CARRY OUT, respectively.
fCK is the input frequency of the CK.
Note4: for TC7MH161FK only


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