MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order Number: MC100ES6111/D

Rev 1, 05/2002

Low Voltage 2.5/3.3V

Differential ECL/PECL/HSTL

Fanout Buffer

The Motorola MC100ES6111 is a bipolar monolithic differential clock

fanout buffer. Designed for most demanding clock distribution systems,

the MC100ES6111 supports various applications that require distribution

of precisely aligned differential clock signals. Using SiGe:C technology

and a fully differential architecture, the device offers very low skew

outputs and superior digital signal characteristics. Target applications for

this clock driver is high performance clock distribution in computing,

networking and telecommunication systems.

Functional Description

The MC100ES6111 is designed for low skew clock distribution systems and supports clock frequencies up to 2.7 GHz. The

device accepts two clock sources. The CLKA input can be driven by ECL or PECL compatible signals, the CLKB input accepts

HSTL compatible signals. The selected input signal is distributed to 10 identical, differential ECL/PECL outputs. If VBB is

connected to the CLKA input and bypassed to GND by a 10 nF capacitor, the MC100ES6111 can be driven by single-ended

ECL/PECL signals utilizing the VBB bias voltage output.

In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if

only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts

being used on that side should be terminated.

The MC100ES6111 can be operated from a single 3.3V or 2.5V supply. As most other ECL compatible devices, the

MC100ES6111 supports positive (PECL) and negative (ECL) supplies. The MC100ES6111 is pin and function compatible to the

MC100EP111.

MC100ES6111

LOW–VOLTAGE

1:10 DIFFERENTIAL

ECL/PECL/HSTL

CLOCK FANOUT DRIVER

FA SUFFIX

32–LEAD LQFP PACKAGE

CASE 873A