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LM3500 Fiches technique(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce LM3500
Description  Synchronous Step-up DC/DC Converter for White LED
Download  18 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3500 Fiches technique(HTML) 5 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
Specifications in standard type face are for T
J = 25˚C and those in boldface type apply over the full Operating Temperature
Range (T
J = −40˚C to +125˚C). Unless otherwise specified VIN =2.7V and specification apply to both LM3500-16 and LM3500-
21.
Symbol
Parameter
Conditions
Min
(Note 7)
Typ
(Note 8)
Max
(Note 7)
Units
I
SD
SHDN Pin Current (Note 10)
SHDN = 5.5V
18
30
µA
SHDN = 2.7V
9
16
SHDN = GND
0.1
I
L
Switch Leakage Current
(LM3500-16)
V
SW = 15V
0.01
0.5
µA
Switch Leakage Current
(LM3500-21)
V
SW = 20V
0.01
2.0
UVP
Input Undervoltage Lockout
ON Threshold
2.4
2.5
2.6
V
OFF Threshold
2.3
2.4
2.5
OVP
Output Overvoltage
Protection (LM3500-16)
ON Threshold
15
15.5
16
V
OFF Threshold
14
14.6
15
Output Overvoltage
Protection (LM3500-21)
ON Threshold
20
20.5
21
OFF Threshold
19
19.5
20
I
Vout
V
OUT Bias Current
(LM3500-16)
V
OUT = 15V, SHDN = VIN
260
400
µA
V
OUT Bias Current
(LM3500-21)
V
OUT = 20V, SHDN = VIN
300
460
I
VL
PMOS Switch Leakage
Current (LM3500-16)
V
OUT = 15V, VSW =0V
0.01
3
µA
PMOS Switch Leakage
Current (LM3500-21)
V
OUT = 20V, VSW =0V
0.01
3
SHDN
Threshold
SHDN Low
0.65
0.3
V
SHDN High
1.1
0.65
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: This condition applies if VIN < VOUT.IfVIN > VOUT, a voltage greater than VIN + 0.3V should not be applied to the VOUT or VSW pins.
Note 3: For more detailed soldering information and specifications, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip
Scale Package (AN-1112), available at www.national.com.
Note 4: The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125
oC), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX).
Note 6: Junction-to-ambient thermal resistance (
θJA) is highly application and board-layout dependent. The 75oC/W figure provided was measured on a 4-layer test
board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues when
designing the board layout.
Note 7: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 8: Typical numbers are at 25˚C and represent the most likely norm.
Note 9: Feedback current flows out of the pin.
Note 10: Current flows into the pin.
www.national.com
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