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TS68040MR33A Fiches technique(PDF) 11 Page - ATMEL Corporation |
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TS68040MR33A Fiches technique(HTML) 11 Page - ATMEL Corporation |
11 / 49 page 11 TS68040 2116A–HIREL–09/02 Output Buffer Mode The 68040 is capable of resetting to enable for a combination of either large buffers or small buffers on the outputs of the miscellaneous control signals, data bus, and address bus/transfer attribute pins. The large buffers offer quicker output times, which allow for an easier logic design. However, they do so by driving about 11 times as much current as the small buffers (refer to TS68040 Electrical specifications for current output). The designer should consider whether the quicker timings present enough advantage to jus- tify the additional consideration to the individual signal terminations, the die power consumption, and the required cooling for the device. Since the TS68040 can be pow- ered-up in one of eight output buffer modes upon reset, the actual maximum power consumption for TS68040 rated at a particular maximum operating frequency is depen- dent upon the power up mode. Therefore, the TS68040 is rated at a maximum power dissipation for either the large buffers or small buffers at a particular frequency (refer to TS68040 Electrical specifications). This allows the possibility of some of the thermal management to be controlled upon reset. The following equation provides a rough method to calculate the maximum power consumption for a chosen output buffer mode: P D = PDSB + (PDLB - PDSB) · (PINSLB/PINSCLB) (1) where: P D = Max. power dissipation for output buffer mode selected P DSB = Max. power dissipation for small buffer mode (all outputs) P DLB = Max. power dissipation for large buffer mode (all outputs) PINS LB = Number of pins large buffer mode PINS CLB = Number of pins capable of the large buffer mode Table 6 shows the simplified relationship on the maximum power dissipation for eight possible configurations of output buffer modes. Table 6. Maximum Power Dissipation for Output Buffer Mode Configurations Output Configuration Maximum Power Dissipation Data Bus Address Bus and Transfer Attrib. Misc. Control Signals PD Small Buffer Small Buffer Small Buffer P DSB Small Buffer Small Buffer Large Buffer P DSB + (PDLB - PDSB) · 13% Small Buffer Large Buffer Small Buffer PDSB + (PDLB - PDSB) · 52% Small Buffer Large Buffer Large Buffer P DSB + (PDLB - PDSB) · 65% Large Buffer Small Buffer Small Buffer P DSB + (PDLB - PDSB) · 35% Large Buffer Small Buffer Large Buffer PDSB + (PDLB - PDSB) · 48% Large Buffer Large Buffer Small Buffer P DSB + (PDLB - PDSB) · 87% Large Buffer Large Buffer Large Buffer P DSB + (PDLB - PDSB) · 100% |
Numéro de pièce similaire - TS68040MR33A |
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Description similaire - TS68040MR33A |
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