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SI9167 Fiches technique(PDF) 4 Page - Vishay Siliconix |
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SI9167 Fiches technique(HTML) 4 Page - Vishay Siliconix |
4 / 8 page AN727 Vishay Siliconix www.vishay.com S FaxBack 408-970-5600 4 Document Number: 70959 07-Jul-99 FIGURE 6. PSM-PWM-PSM Transition VIN = 7.2 V, VO = 3.6 V, IO = 150 mA Ch1: VOUT (200 mV/div) Ch2: Inductor Current (500 mA/div) Ch3: PWM/PSM (High PWM, Low PSM) PSM-PWM Operation The Si9167 can operate in either fixed-frequency PWM mode or fixed on-time pulse skipping mode (PSM). Switching losses resulting from the gate charge of the driver and internal BICMOS circuitry are fixed irrespective of the output power drawn from the converter. At lower output levels, the percentage of these losses is high, which makes the circuit less efficient. Therefore, at output loads lower than 150 mA, PSM operation is recommended. PSM operation reduces the operating frequency, depending upon the load, which in turn reduces the switching losses proportionally and keeps the efficiency high at all load current levels. Low operating frequencies can become a concern if they are in the audible range. Special care has been taken in the Si9167 to ensure that the operating frequency will always be above 20 kHz in pulse-skipping mode at output load currents as low as 6 mA. A load current of 150 mA is guaranteed in PSM, while PWM mode is used for higher load current operation. In this way, converter efficiency is always optimized. Efficiency versus load plots are provided in figures 14 and 15. Two different sections control the operation of the converter in either PWM mode or PSM. When PWM mode is selected, the PWM control section is active, thereby disabling the PSM control and vice versa. During the PWM-to-PSM transition, there is an overlapping time between the PWM and the PSM circuit activation, which keeps the output voltage from drooping. However, while transitioning from PSM to PWM, there is no such overlap. The time needed to activate the PWM circuit, after the PSM circuit is turned off, is called the blanking time. During this time there are no pulses. This blanking time is typically between 5 to 10 ms. Figure 6 shows the behavior of the output voltage, output, and coil current during the PSM- PWM-PSM transition. The sag in the output depends upon the output capacitance and ESR. The capacitor must be selected for an acceptable droop in output voltage at a maximum load current in PSM, and is given by the following equation: V O_DROP + IOUT t BLANK C OUT ) ESR (1) Where VO_DROP = Output droop during Transition (V) tBLANK = Blanking time (S) COUT = Output Capacitor (F) ESR = ESR of output Capacitor ( W) IOUT = Output Load (A) Inductor Selection A wide selection of inductors is available from vendors such as Vishay Dale, Coiltronix, and Sumida. Major factors to consider include inductance value, saturating current, and equivalent series resistance (RL). Since the Si9167 can be operated at up to 2 MHz, required inductance for a given output capacitor and ripple current could be as low as 1.5 mH, where: (2) dMIN + V OUT ) VR_DROP V INMAX * VDSQP L MIN + V INMAX * VDSQP * VOUT ) VR_DROP dMIN 0.72 Fsw DI V DSQP + 0.42 I OUT V R_DROP + R L ) RTRACE I OUT |
Numéro de pièce similaire - SI9167 |
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Description similaire - SI9167 |
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