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STK12C68-5C40M Fiches technique(PDF) 6 Page - List of Unclassifed Manufacturers |
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STK12C68-5C40M Fiches technique(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 10 page STK12C68-M 4-58 28 t AVAV t RC STORE/RECALL Initiation Cycle Time 35 45 55 ns 29 t ELQZ p Chip Enable to Output Inactive 85 85 85 ns 30 tAVELN tAE Address Set-up to Chip Enable 0 0 0 ns 31 tELEHN q,r tEP Chip Enable Pulse Width 25 35 45 ns 32 tEHAXN tEA Chip Disable to Address Change 0 0 0 ns SOFTWARE STORE/RECALL CYCLE q,r,t ADDRESS E DQ(Data Out) VALID ADDRESS #6 ADDRESS #1 VALID HIGH IMPEDANCE 28 tAVAV 28 tAVAV 30 tAVELN 31 tELEHN 32 tEHAXN 23 tSTORE 22 tRECALL 29 tELQZ ADDRESS #2 Std. Alt. MIN MAX MIN MAX MIN MAX NO. PARAMETER UNITS SYMBOLS STK12C68-40M STK12C68-45M STK12C68-55M Note p: Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs. Note q: Noise on the E pin may trigger multiple read cycles from the same address and abort the address sequence. Note r: If the Chip Enable Pulse Width is less than tELQV (see READ CYCLE #2) but greater than or equal to tELEHN, then the data may not be valid at the end of the low pulse, however the STORE or RECALL will still be initiated. Note s: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW throughout. Addresses #1 through #6 are found in the MODE SELECTION table. Address #6 determines whether the STK12C68-M performs a STORE or RECALL. Note t: E must be used to clock in the address sequence for the Software STORE and RECALL cycles. SOFTWARE STORE/RECALL CYCLE (VCC = 5.0V ± 10%) d |
Numéro de pièce similaire - STK12C68-5C40M |
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Description similaire - STK12C68-5C40M |
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