AD7889 datasheet(30/40 Pages) AD

No de pièce	AD7889

Description	Low Voltage Controller for Touch Screens

Download	40 Pages

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Fabricant	AD [Analog Devices]

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30 / 40 page

AD7879/AD7889

Data Sheet

Rev. D | Page 30 of 40

CONTROL REGISTER 3

Control Register 3 (Address 0x03) includes the interrupt

register (Bits[15:8]) and the sequencer bits (Bits[7:0]).

Sequencer (Control Register 3, Bits[7:0])

The sequencer bits control which channels are converted during

a conversion sequence in both slave mode and master mode.

To include a measurement in a sequence, the relevant bit must

be set in the sequence. Setting Bit 7 includes a measurement on

the X+ channel (Y position). Setting Bit 6 includes a measure-

ment on the Y+ channel (X position), and so on (see Table 14).

Figure 34 illustrates the correspondence between the bits in

Control Register 3 and the various measurements. Bit 0 is

not used.

SLAVE MODE

CONVERSION

SEQUENCE

TIMER = 00?

START TIMER

WAIT FOR TIMER

SINGLE

CONVERSION

MASTER MODE

WAIT FOR

FIRST TOUCH

CONVERSION

SEQUENCE

SCREEN

TOUCHED?

TIMER = 00?

START TIMER

WAIT FOR TIMER

SCREEN

TOUCHED?

IDLE

ADC MODE?

10

YES

NO

YES

NO

11

00

01

Figure 32. Conversion Modes

FCD

REQ’D?

WAIT FOR

ACQUISITION

ACQ

SET CHANNEL

CONVERT DATA

AVERAGE DATA

TRANSFER DATA

TO REGISTERS

SET ALERT AND

INTERRUPT

1MEDIAN # MEANS MEDIAN

FILTER SIZE.

RANK NEW

DATA

(WAIT tSORT)

MEDIAN

# OF SAMPLES

TAKEN?1

NO

YES

START OF

CONVERSION

SEQUENCE

FCD

MAV FILTER

ENABLED

?

OUT-OF-

LIMIT?

END OF

SEQUENCE

?

YES

NO

YES

NO

Figure 33. Conversion Sequence

TEMP

MASK

AUX/

VBAT

MASK

INT

MODE

GPIO

ALERT

AUX/

VBAT

LOW

AUX/

VBAT

HIGH

TEMP

HIGH

X+

Y+

Z1

Z2

AUX

VBAT TEMP

NOT

USED

0

15

TEMP

LOW

Figure 34. Control Register 3

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