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TA1360ANG Fiches technique(PDF) 69 Page - Toshiba Semiconductor

No de pièce TA1360ANG
Description  TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
Download  108 Pages
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Fabricant  TOSHIBA [Toshiba Semiconductor]
Site Internet  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TA1360ANG Fiches technique(HTML) 69 Page - Toshiba Semiconductor

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TA1360ANG
2003-01-21
69
Test Conditions
SW Mode
Note No.
Characteristics
SW3
SW4
SW5
SW7
Test Method (Test condition: VCC = 9 V/2 V, Ta = 25 ± 3°C)
C
A
A
B
SW8
SW9
SW10
SW56
S02
Dynamic Y/C compensation
B
B
B
OPEN
1.
Input 100-kHz sync signal to TP4, and set #4 amplitude to 0.2 Vp-p.
2.
Set Y mute OFF (P-MODE: Normal 1, 000), brightness to center (1000000), color to center (1000000),
unicolor to maximum (1111111), and Y/C Gain Comp to minimum (00). Set black stretch point 1 to OFF (000),
dark area static Y
γ gain to minimum (00), light area static Yγ gain to maximum (11), and SW1 to B. Apply 5.16
V to #3 from external power supply PS1.
3.
Monitor #41 output waveform, and measure amplitude VBDY0.
4.
Set Y/C Gain Comp to maximum (11). Set SW1 to B. Set black stretch point 1 to OFF (000), dark area static
Y
γ gain to maximum (11), light area static Yγ gain to maximum (00), and monitor #41 amplitude VBDY1.
5.
Set Y/C Gain Comp to maximum (11). Switch SW1 to A, and TPI to GND. Set black stretch point 1 to
maximum (111), dark area static Y
γ gain to minimum (00), bright area static Yγ gain to maximum (11), and
monitor #41 amplitude VBDY2.
6.
Calculate the following equations.
GCBDY1 = 20 × og
l
(VBDY1/VBDY0), GCBDY2 = 20 × og
l
(VBDY2/VBDY0)
7.
Input 100-kHz sync signal to TP5, and repeat the procedure above. Calculate the following equations.
GCRDY1 = 20 × og
l
(VRDY1/VRDY0), GCRDY2 = 20 × og
l
(VRDY2/VBDY0)


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