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TDA3LXRBFABFQ1 Fiches technique(PDF) 10 Page - Texas Instruments

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No de pièce TDA3LXRBFABFQ1
Description  SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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TDA3LXRBFABFQ1 Fiches technique(HTML) 10 Page - Texas Instruments

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: TDA3MV TDA3MA TDA3LX TDA3LA
Terminal Configuration and Functions
Copyright © 2016–2017, Texas Instruments Incorporated
MUXMODE values which correspond to defined functions should be used.
6. TYPE: Signal type and direction:
I = Input
O = Output
IO = Input or Output
D = Open drain
DS = Differential Signaling
A = Analog
PWR = Power
GND = Ground
CAP = LDO Capacitor
7. BALL RESET STATE: The state of the terminal at power-on reset:
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated).
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated).
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
8. BALL RESET REL. STATE: The state of the terminal at the deactivation of the rstoutn signal (also
mapped to the PRCM SYS_WARM_OUT_RST signal).
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated).
drive clk (OFF): The buffer drives a toggling clock (pulldown or pullup resistor not activated).
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated).
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
NOTE
For more information on the CORE_PWRON_RET_RST reset signal and its reset sources,
see the Power, Reset, and Clock Management / Reset Management Functional Description
section of the Device TRM.
9. BALL RESET REL. MUXMODE: This muxmode is automatically configured at the release of the
rstoutn signal (also mapped to the PRCM SYS_WARM_OUT_RST signal).
10. IO VOLTAGE VALUE: This column describes the IO voltage value (VDDS supply).
11. POWER: The voltage supply that powers the terminal IO buffers.
12. HYS: Indicates if the input buffer is with hysteresis:
Yes: With hysteresis
No: Without hysteresis
An empty box means "Yes".
NOTE
For more information, see the hysteresis values in Section 5.7, DC Electrical Characteristics.
13. BUFFER TYPE: Drive strength of the associated output buffer.
NOTE
For programmable buffer strength:
The default value is given in Table 4-2.
A note describes all possible values according to the selected muxmode.
14. PULL UP / DOWN TYPE: Denotes the presence of an internal pullup or pulldown resistor. Pullup and


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