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74LVC2G240DC Fiches technique(PDF) 10 Page - NXP Semiconductors |
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74LVC2G240DC Fiches technique(HTML) 10 Page - NXP Semiconductors |
10 / 20 page 2003 Mar 11 10 Philips Semiconductors Product specification Dual buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state 74LVC2G240 handbook, full pagewidth MNA961 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM Fig.5 3-state enable and disable times for input nOE. VCC VM INPUT VI tr =tf 1.65 to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 to 2.7 V 0.5 × V CC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 to 5.5 V 0.5 × V CC VCC ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. VX =VOL + 0.3 V at VCC ≥ 2.7 V; VX =VOL + 0.15 V at VCC < 2.7 V; VY =VOH − 0.3 V at VCC ≥ 2.7 V; VY =VOH − 0.15 V at VCC < 2.7 V. |
Numéro de pièce similaire - 74LVC2G240DC |
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Description similaire - 74LVC2G240DC |
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