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DAC38RF82 Fiches technique(PDF) 2 Page - Texas Instruments

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No de pièce DAC38RF82
Description  Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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DAC38RF82 Fiches technique(HTML) 2 Page - Texas Instruments

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DAC38RF82, DAC38RF89
SLASEA6B – FEBRUARY 2017 – REVISED AUGUST 2017
www.ti.com
Product Folder Links: DAC38RF82 DAC38RF89
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Device Comparison Table..................................... 4
6
Pin Configuration and Functions ......................... 4
7
Specifications......................................................... 7
7.1
Absolute Maximum Ratings ...................................... 7
7.2
ESD Ratings.............................................................. 7
7.3
Recommended Operating Conditions ....................... 7
7.4
Thermal Information .................................................. 8
7.5
Electrical Characteristics - DC Specifications ........... 8
7.6
Electrical Characteristics - Digital Specifications .... 10
7.7
Electrical Characteristics - AC Specifications ......... 13
7.8
PLL/VCO Electrical Characteristics ........................ 15
7.9
Timing Requirements .............................................. 17
7.10
Typical Characteristics .......................................... 18
8
Detailed Description ............................................ 23
8.1
Overview ................................................................. 23
8.2
Functional Block Diagrams ..................................... 23
8.3
Feature Description................................................. 25
8.4
Device Functional Modes........................................ 60
8.5
Register Maps ........................................................ 64
9
Application and Implementation ...................... 126
9.1
Application Information.......................................... 126
9.2
Typical Application ............................................... 127
10
Power Supply Recommendations ................... 131
10.1
Power Supply Sequencing .................................. 132
11
Layout................................................................. 132
11.1
Layout Guidelines ............................................... 132
11.2
Layout Example .................................................. 134
12
Device and Documentation Support ............... 135
12.1
Related Links ...................................................... 135
12.2
Receiving Notification of Documentation
Updates.................................................................. 135
12.3
Community Resources........................................ 135
12.4
Trademarks ......................................................... 135
12.5
Electrostatic Discharge Caution .......................... 135
12.6
Glossary .............................................................. 135
13
Mechanical, Packaging, and Orderable
Information ......................................................... 135
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April 2017) to Revision B
Page
Deleted Changed Feature From: Interpolation: 1,2,4,24x To: Interpolation: 1,2,24x ............................................................. 1
Changed the ALARM pin From: alarm_out_pol To: alm_out_pol in the Pin Functions table................................................. 5
Changed the Description of pins A3, A4, A7, A6, A9, A10, A12, E12, F11, F7, G6, H5, H7, J6, J11 in the Pin
Functions table ....................................................................................................................................................................... 5
Changed description of TXENABLE pin in the PIN Functions table ...................................................................................... 6
Changed the MAX value of VEE18N rail From: 0.5 V To 0.3 V in the Absolute Maximum Ratings table ............................. 7
Added "Supply Voltage Range" to the Recommended Operating Conditions table .............................................................. 7
Changed DNL typical value From: ±0.5 to ±3 LSB in Electrical Characteristics - DC Specifications table ........................... 8
Changed INL typical value From: ±1 To: ±4 LSB in Electrical Characteristics - DC Specifications table.............................. 8
Added "Reference voltage drift" to the Electrical Characteristics - DC Specifications table .................................................. 8
Changed Power Dissipation Test Condition From: MODE 5: dual channel, 8-bit input mode, 2x Interpolation To:
MODE 5: dual channel, 8-bit input mode, 1x Interpolation in the Electrical Characteristics - DC Specifications .................. 9
Changed the ILOAD values to negative for CMOS interface parameter, low-level output voltage, in the Electrical
Characteristics - Digital Specifications table......................................................................................................................... 10
Added 0 dBFS to the condition statement for the Electrical Characteristics - AC Specifications table ............................... 13
Added MIN and TYP value to maximum DAC sample rate for DAC38RF89 only in the Electrical Characteristics - AC
Specifications table............................................................................................................................................................... 13
Added NSD values for DAC38RF82 with on-chip PLL enabled to Electrical Characteristics - AC Specifications table...... 15
Changed the Isolation values in the TEST CONDITIONS, TYP value From: 74 dBc To: 82 dBc and 56 dBc To 73
dBc in the Electrical Characteristics - AC Specifications table............................................................................................. 15
Added Figure 16 ................................................................................................................................................................... 19
Changed the MPY values in Table 4.................................................................................................................................... 27
Added MPY value for 16.5x in the Table 4........................................................................................................................... 27
Changed input rate max and fdac max for 6x interpolation mode in Table 9 ..................................................................... 30


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